Message ID | 1665576159-3749-15-git-send-email-quic_vpolimer@quicinc.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show
Return-Path: <linux-arm-msm-owner@kernel.org> X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9930DC4167D for <linux-arm-msm@archiver.kernel.org>; Wed, 12 Oct 2022 12:03:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229727AbiJLMDH (ORCPT <rfc822;linux-arm-msm@archiver.kernel.org>); Wed, 12 Oct 2022 08:03:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229589AbiJLMC4 (ORCPT <rfc822;linux-arm-msm@vger.kernel.org>); Wed, 12 Oct 2022 08:02:56 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 976C1A7ABB; Wed, 12 Oct 2022 05:02:55 -0700 (PDT) Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 29C7xRTO022518; Wed, 12 Oct 2022 12:02:53 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=qcppdkim1; bh=trUU7Dutoa8QiSLvUV0dWrSkIo/oWClKBSIX2JC9GO8=; b=GN6o6Vk7T/Sx3MELdpEJly7rhdyyTNY9Tq13jrvUIqBsC8AO1Qz4u7K8z1+WLThHxJcA iIAcdzirPHAUBPfVRdUk4Ub2/iyEllw8CuWd6yiXkR5aZ9ZilaG2G9TIuVVht8QckXY+ nmzbCt+9W3VyGuUznjLGI5JymqvL79vLvowQ7rqJCHLEBwoVUKcTbWRTEg9cqMtpRBKY 3ICPkjVpy0rSUeCn2YdBwL13PJ3WCswAwRVw9YtADrDOVtYzSe2GMAUZ3rHBDtj8WirP 7G/wGMykco1HjdDqH3m6RyWYuBHHsT0UlbFRrGY2tdlgndNz6oWgbeJ06ydC/l3HgrOR AQ== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3k5j7b1tdb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 12 Oct 2022 12:02:53 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 29CC2lOb026862; Wed, 12 Oct 2022 12:02:50 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 3k3jpu0t31-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Wed, 12 Oct 2022 12:02:50 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 29CC2l8I026838; Wed, 12 Oct 2022 12:02:49 GMT Received: from vpolimer-linux.qualcomm.com (vpolimer-linux.qualcomm.com [10.204.67.235]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 29CC2mMQ026874; Wed, 12 Oct 2022 12:02:49 +0000 Received: by vpolimer-linux.qualcomm.com (Postfix, from userid 463814) id 88366394C; Wed, 12 Oct 2022 17:32:47 +0530 (IST) From: Vinod Polimera <quic_vpolimer@quicinc.com> To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Vinod Polimera <quic_vpolimer@quicinc.com>, linux-kernel@vger.kernel.org, robdclark@gmail.com, dianders@chromium.org, swboyd@chromium.org, quic_kalyant@quicinc.com, dmitry.baryshkov@linaro.org, quic_khsieh@quicinc.com, quic_vproddut@quicinc.com, quic_bjorande@quicinc.com, quic_aravindh@quicinc.com, quic_abhinavk@quicinc.com, quic_sbillaka@quicinc.com Subject: [PATCH v8 14/15] drm/msm/disp/dpu: reset the datapath after timing engine disable Date: Wed, 12 Oct 2022 17:32:38 +0530 Message-Id: <1665576159-3749-15-git-send-email-quic_vpolimer@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1665576159-3749-1-git-send-email-quic_vpolimer@quicinc.com> References: <1665576159-3749-1-git-send-email-quic_vpolimer@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: A29oIhdsKouZh4nPRWRq7_Iql3FLcRX1 X-Proofpoint-ORIG-GUID: A29oIhdsKouZh4nPRWRq7_Iql3FLcRX1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-12_06,2022-10-12_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 phishscore=0 spamscore=0 suspectscore=0 clxscore=1015 impostorscore=0 adultscore=0 mlxlogscore=950 malwarescore=0 priorityscore=1501 bulkscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210120079 Precedence: bulk List-ID: <linux-arm-msm.vger.kernel.org> X-Mailing-List: linux-arm-msm@vger.kernel.org |
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Add PSR support for eDP
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expand
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diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index 5a0dc54..aeeb759 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -590,6 +590,7 @@ static void dpu_encoder_phys_vid_disable(struct dpu_encoder_phys *phys_enc) } } + dpu_encoder_helper_phys_cleanup(phys_enc); phys_enc->enable_state = DPU_ENC_DISABLED; }
Reset the datapath after disabling the timing gen, such that it can start on a clean slate when the intf is enabled back. This was a recommended sequence from the DPU HW programming guide. Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 1 + 1 file changed, 1 insertion(+)