From patchwork Fri Dec 30 13:43:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 13084382 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25B30C4708E for ; Fri, 30 Dec 2022 13:44:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235104AbiL3NoL (ORCPT ); Fri, 30 Dec 2022 08:44:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235095AbiL3NoJ (ORCPT ); Fri, 30 Dec 2022 08:44:09 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 037C319C3C; Fri, 30 Dec 2022 05:44:09 -0800 (PST) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2BUD39E1005462; Fri, 30 Dec 2022 13:44:03 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=LTJE8Egxny/At0SxyBqPeknMMLKZkVCCncN+gdpYZPM=; b=Q8mah8RFMDkXoXEVcKScOfkh9PxAr55y4xtp55Ro8fFm4tMqDJhpu3+UUTz70OAZ6Rl+ zUKKvbhxfCv+PZ2f01qH0+xmrPIDLevQVOjbg5cR/d217B1gmgtq0MUunSOIvq75bSpe 2vveI/xSDFicsbfLo561+NjbjJ8PBSVyugdfPG6MsIVEKvx2hGynWhk+MBr4mvwCZMZH DTnL/vj8c+RF9lSXDMEZ1Krvg0fJNi4QHHjdM6lmbN5lgW7QBWpFV6WPArP0CaqX0nib na8T5oVm/rSLFGPjcNDFyogA9PYKe27hPk0rZ2cGp9LJD8tX4NW5IprpOJw4j9UzGYUT /w== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3mrjugva5r-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 30 Dec 2022 13:44:03 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2BUDhuxH005525 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 30 Dec 2022 13:43:56 GMT Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 30 Dec 2022 05:43:51 -0800 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [PATCH v2 2/4] dt-bindings: clock: qcom,sc7280-lpasscc: Add resets for audioreach Date: Fri, 30 Dec 2022 19:13:17 +0530 Message-ID: <1672407799-13768-3-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1672407799-13768-1-git-send-email-quic_srivasam@quicinc.com> References: <1672407799-13768-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 1ub8slI0rtCZRAKGX3F54icddmRj-tCw X-Proofpoint-GUID: 1ub8slI0rtCZRAKGX3F54icddmRj-tCw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-30_08,2022-12-30_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=999 malwarescore=0 adultscore=0 phishscore=0 priorityscore=1501 clxscore=1015 impostorscore=0 mlxscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2212300120 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks for audioreach based SC7280 platforms. Signed-off-by: Srinivasa Rao Mandadapu Tested-by: Mohammad Rafi Shaik --- .../devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml index 9c72b8e..40fc6ab 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml @@ -31,13 +31,18 @@ properties: '#clock-cells': const: 1 + '#reset-cells': + const: 1 + reg: items: - description: LPASS top-cc register + - description: LPASS reset-cgcr register reg-names: items: - const: top_cc + - const: reset_cgcr required: - compatible @@ -54,10 +59,11 @@ examples: #include clock-controller@3c04000 { compatible = "qcom,sc7280-lpasscc"; - reg = <0x03c04000 0x4>; - reg-names = "top_cc"; + reg = <0x03c04000 0x4>, <0x032a9000 0x1000>; + reg-names = "top_cc", "reset_cgcr"; clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>; clock-names = "iface"; #clock-cells = <1>; + #reset-cells = <1>; }; ...