From patchwork Fri Jan 20 14:16:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 13110084 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6059C25B4E for ; Fri, 20 Jan 2023 15:11:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231316AbjATPLs (ORCPT ); Fri, 20 Jan 2023 10:11:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45540 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230059AbjATPLr (ORCPT ); Fri, 20 Jan 2023 10:11:47 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 349ADD88C8; Fri, 20 Jan 2023 07:11:45 -0800 (PST) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 30KDe1wu000771; Fri, 20 Jan 2023 14:17:31 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=A/QBbR3qmsM7+Eno3cmdmG34p5Bp0U+S541FPNpCN0I=; b=mcd6khLLgclCISQl/1he5tZcmtaFVdl96ACc25dRQF8ssAtcmklH/EUXPnpBf4+5h2vp 8eau3BoNCU+c9mdYE0hkXb3TV22/U51ArU803hyzdApqDjB721LzePLVzLTUAdt+KAfm BGTaGPI2g1Py4jnN6HiQ4L4+xUh1cKruw/CRRrp9CojhwvEu6zXmdmPMX+7Z6V2xAG6A Fv+6KbhhM56UM2UtDS9ZRRGW5LemkufpU+cmSLeFc5Yqn84i+yQn5KC+3npsAxbqJcQE djOP0BnKMfiV0JVRL0hfHhh93JZUK0iCuVsRyt7gSV17it0U3VMZ/9qnwdrW8Jd4zduP QA== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3n700yuuu9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 20 Jan 2023 14:17:31 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 30KEHU1u023857 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 20 Jan 2023 14:17:30 GMT Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 20 Jan 2023 06:17:24 -0800 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [PATCH v4 5/7] arm64: dts: qcom: sc7280: Update lpass_tlmm node Date: Fri, 20 Jan 2023 19:46:39 +0530 Message-ID: <1674224201-28109-6-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1674224201-28109-1-git-send-email-quic_srivasam@quicinc.com> References: <1674224201-28109-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 7c-pwPu4HIS5Yac-3ebLFdkxxSvagYE5 X-Proofpoint-ORIG-GUID: 7c-pwPu4HIS5Yac-3ebLFdkxxSvagYE5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-20_08,2023-01-20_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 mlxscore=0 bulkscore=0 phishscore=0 mlxlogscore=999 impostorscore=0 adultscore=0 suspectscore=0 spamscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301200135 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Update lpass_tlmm clock properties, as different clock sources are required in ADSP enabled platforms. Also update LPASS_MCC register region. This is required to avoid memory region conflicts due to overlapping lpass_efuse Q6 regmap region used in LPASS PIL node. Signed-off-by: Srinivasa Rao Mandadapu Tested-by: Mohammad Rafi Shaik --- .../arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi index 0add125..4def6b3 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi @@ -121,6 +121,15 @@ status = "okay"; }; +&lpass_tlmm { + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + + clock-names = "core", "audio"; + reg = <0 0x033c0000 0x0 0x20000>, + <0 0x03550000 0x0 0xa100>; +}; + &lpass_tx_macro { /delete-property/ power-domains; /delete-property/ power-domain-names;