diff mbox series

[v1,02/14] drm/msm/dp: add dsc factor into calculation of supported bpp

Message ID 1674498274-6010-3-git-send-email-quic_khsieh@quicinc.com (mailing list archive)
State Not Applicable
Headers show
Series add display port DSC feature | expand

Commit Message

Kuogee Hsieh Jan. 23, 2023, 6:24 p.m. UTC
When FEC enabled, it introduces 2.5% overhead into link capacity.
This factor have to be considered into calculation supported bpp.

Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
---
 drivers/gpu/drm/msm/dp/dp_panel.c | 45 +++++++++++++++++++++++++++++++++------
 1 file changed, 38 insertions(+), 7 deletions(-)

Comments

kernel test robot Jan. 23, 2023, 11:38 p.m. UTC | #1
Hi Kuogee,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on next-20230123]
[also build test WARNING on linus/master v6.2-rc5]
[cannot apply to drm-misc/drm-misc-next drm/drm-next drm-exynos/exynos-drm-next drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-tip/drm-tip v6.2-rc5 v6.2-rc4 v6.2-rc3]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Kuogee-Hsieh/drm-msm-dp-add-dpcd-read-of-both-dsc-and-fec-capability/20230124-022759
patch link:    https://lore.kernel.org/r/1674498274-6010-3-git-send-email-quic_khsieh%40quicinc.com
patch subject: [PATCH v1 02/14] drm/msm/dp: add dsc factor into calculation of supported bpp
config: sparc-allyesconfig (https://download.01.org/0day-ci/archive/20230124/202301240748.RCxiAZH1-lkp@intel.com/config)
compiler: sparc64-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/745d7acf9ef8affe996fce2f0658a6d95ac151fd
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Kuogee-Hsieh/drm-msm-dp-add-dpcd-read-of-both-dsc-and-fec-capability/20230124-022759
        git checkout 745d7acf9ef8affe996fce2f0658a6d95ac151fd
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=sparc olddefconfig
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=sparc SHELL=/bin/bash drivers/gpu/drm/msm/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/msm/dp/dp_panel.c: In function 'dp_panel_get_supported_bpp':
>> drivers/gpu/drm/msm/dp/dp_panel.c:125:34: warning: variable 'panel' set but not used [-Wunused-but-set-variable]
     125 |         struct dp_panel_private *panel;
         |                                  ^~~~~


vim +/panel +125 drivers/gpu/drm/msm/dp/dp_panel.c

   120	
   121	static u32 dp_panel_get_supported_bpp(struct dp_panel *dp_panel,
   122			u32 mode_edid_bpp, u32 mode_pclk_khz)
   123	{
   124		struct dp_link_info *link_info;
 > 125		struct dp_panel_private *panel;
   126		const u32 max_supported_bpp = 30;
   127		u32 min_supported_bpp = 18;
   128		u32 bpp = 0, link_bitrate = 0, mode_bitrate;
   129		s64 rate_fp = 0;
   130	
   131		panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
   132	
   133		if (dp_panel->dsc_en)
   134			min_supported_bpp = 24;
   135	
   136		bpp = min_t(u32, mode_edid_bpp, max_supported_bpp);
   137	
   138		link_info = &dp_panel->link_info;
   139	
   140		rate_fp = drm_int2fixp(link_info->num_lanes * link_info->rate * 8);
   141	
   142		if (dp_panel->fec_en)
   143			rate_fp = drm_fixp_div(rate_fp, dp_panel->fec_overhead_fp);
   144	
   145		link_bitrate = drm_fixp2int(rate_fp);
   146	
   147		for (; bpp > min_supported_bpp; bpp -= 6) {
   148			if (dp_panel->dsc_en) {
   149				if (bpp == 30 && !(dp_panel->sink_dsc_caps.color_depth & DP_DSC_10_BPC))
   150					continue;
   151				else if (bpp == 24 && !(dp_panel->sink_dsc_caps.color_depth & DP_DSC_8_BPC))
   152					continue;
   153	
   154				mode_bitrate = mode_pclk_khz * DSC_TGT_BPP;
   155			} else {
   156				mode_bitrate = mode_pclk_khz * bpp;
   157			}
   158	
   159			if (mode_bitrate <= link_bitrate)
   160				break;
   161		}
   162	
   163		if (bpp < min_supported_bpp)
   164			DRM_ERROR("bpp %d is below minimum supported bpp %d\n", bpp,
   165					min_supported_bpp);
   166	
   167		if (dp_panel->dsc_en && bpp != 24 && bpp != 30 && bpp != 36)
   168			DRM_ERROR("bpp %d is not supported when dsc is enabled\n", bpp);
   169	
   170		return bpp;
   171	}
   172
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c b/drivers/gpu/drm/msm/dp/dp_panel.c
index 5078247..36dad05 100644
--- a/drivers/gpu/drm/msm/dp/dp_panel.c
+++ b/drivers/gpu/drm/msm/dp/dp_panel.c
@@ -11,7 +11,7 @@ 
 #include <drm/drm_edid.h>
 #include <drm/drm_print.h>
 
-#define DSC_TGT_BPP 8
+#define DSC_TGT_BPP 10
 
 struct dp_panel_private {
 	struct device *dev;
@@ -122,20 +122,51 @@  static u32 dp_panel_get_supported_bpp(struct dp_panel *dp_panel,
 		u32 mode_edid_bpp, u32 mode_pclk_khz)
 {
 	struct dp_link_info *link_info;
-	const u32 max_supported_bpp = 30, min_supported_bpp = 18;
-	u32 bpp = 0, data_rate_khz = 0;
+	struct dp_panel_private *panel;
+	const u32 max_supported_bpp = 30;
+	u32 min_supported_bpp = 18;
+	u32 bpp = 0, link_bitrate = 0, mode_bitrate;
+	s64 rate_fp = 0;
+
+	panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
+
+	if (dp_panel->dsc_en)
+		min_supported_bpp = 24;
 
 	bpp = min_t(u32, mode_edid_bpp, max_supported_bpp);
 
 	link_info = &dp_panel->link_info;
-	data_rate_khz = link_info->num_lanes * link_info->rate * 8;
 
-	while (bpp > min_supported_bpp) {
-		if (mode_pclk_khz * bpp <= data_rate_khz)
+	rate_fp = drm_int2fixp(link_info->num_lanes * link_info->rate * 8);
+
+	if (dp_panel->fec_en)
+		rate_fp = drm_fixp_div(rate_fp, dp_panel->fec_overhead_fp);
+
+	link_bitrate = drm_fixp2int(rate_fp);
+
+	for (; bpp > min_supported_bpp; bpp -= 6) {
+		if (dp_panel->dsc_en) {
+			if (bpp == 30 && !(dp_panel->sink_dsc_caps.color_depth & DP_DSC_10_BPC))
+				continue;
+			else if (bpp == 24 && !(dp_panel->sink_dsc_caps.color_depth & DP_DSC_8_BPC))
+				continue;
+
+			mode_bitrate = mode_pclk_khz * DSC_TGT_BPP;
+		} else {
+			mode_bitrate = mode_pclk_khz * bpp;
+		}
+
+		if (mode_bitrate <= link_bitrate)
 			break;
-		bpp -= 6;
 	}
 
+	if (bpp < min_supported_bpp)
+		DRM_ERROR("bpp %d is below minimum supported bpp %d\n", bpp,
+				min_supported_bpp);
+
+	if (dp_panel->dsc_en && bpp != 24 && bpp != 30 && bpp != 36)
+		DRM_ERROR("bpp %d is not supported when dsc is enabled\n", bpp);
+
 	return bpp;
 }