| Message ID | 1681468167-11689-4-git-send-email-quic_srichara@quicinc.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | Add minimal boot support for IPQ5018 | expand |
On Fri, 14 Apr 2023 15:59:21 +0530, Sricharan Ramabadhran wrote: > Add device tree binding Documentation details for ipq5018 > pinctrl driver. > > Co-developed-by: Nitheesh Sekar <quic_nsekar@quicinc.com> > Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com> > Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com> > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> > Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> > --- > [v3] Fixed review comments and DTS schema warnings > > .../bindings/pinctrl/qcom,ipq5018-tlmm.yaml | 129 +++++++++++++++++++++ > 1 file changed, 129 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.example.dtb: pinctrl@1000000: uart2-state: 'oneOf' conditional failed, one must be fixed: 'bias-pull-down', 'drive-strength', 'function', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' 'blsp2_uart' is not one of ['atest_char', 'audio_pdm0', 'audio_pdm1', 'audio_rxbclk', 'audio_rxd', 'audio_rxfsync', 'audio_rxmclk', 'audio_txbclk', 'audio_txd', 'audio_txfsync', 'audio_txmclk', 'blsp0_i2c', 'blsp0_spi', 'blsp0_uart0', 'blsp0_uart1', 'blsp1_i2c0', 'blsp1_i2c1', 'blsp1_spi0', 'blsp1_spi1', 'blsp1_uart0', 'blsp1_uart1', 'blsp1_uart2', 'blsp2_i2c0', 'blsp2_i2c1', 'blsp2_spi', 'blsp2_spi0', 'blsp2_spi1', 'btss', 'burn0', 'burn1', 'cri_trng', 'cri_trng0', 'cri_trng1', 'cxc_clk', 'cxc_data', 'dbg_out', 'eud_gpio', 'gcc_plltest', 'gcc_tlmm', 'gpio', 'led0', 'led2', 'mac0', 'mac1', 'mdc', 'mdio', 'pcie0_clk', 'pcie0_wake', 'pcie1_clk', 'pcie1_wake', 'pll_test', 'prng_rosc', 'pwm0', 'pwm1', 'pwm2', 'pwm3', 'qdss_cti_trig_in_a0', 'qdss_cti_trig_in_a1', 'qdss_cti_trig_in_b0', 'qdss_cti_trig_in_b1', 'qdss_cti_trig_out_a0', 'qdss_cti_trig_out_a1', 'qdss_cti_trig_out_b0', 'qdss_cti_trig_out_b1', 'qdss_traceclk_a', 'qdss_traceclk_b', 'qdss_tracectl_a', 'qdss_tracectl_b', 'qdss_trac edata_a', 'qdss_tracedata_b', 'qspi_clk', 'qspi_cs', 'qspi_data', 'reset_out', 'sdc1_clk', 'sdc1_cmd', 'sdc1_data', 'wci_txd', 'wci_rxd', 'wsa_swrm', 'wsi_clk3', 'wsi_data3', 'wsis_reset', 'xfem'] From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/1681468167-11689-4-git-send-email-quic_srichara@quicinc.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On 14/04/2023 12:29, Sricharan Ramabadhran wrote: > Add device tree binding Documentation details for ipq5018 > pinctrl driver. > Thank you for your patch. There is something to discuss/improve. > + > + interrupt-controller: true > + "#interrupt-cells": true > + gpio-controller: true > + "#gpio-cells": true > + gpio-ranges: true > + wakeup-parent: true > + > + gpio-reserved-ranges: > + minItems: 1 > + maxItems: 33 24 (you cannot have more than 24...) > + > + gpio-line-names: > + maxItems: 47 > + > +patternProperties: > + "-state$": > + oneOf: > + - $ref: "#/$defs/qcom-ipq5018-tlmm-state" > + - patternProperties: > + "-pins$": > + $ref: "#/$defs/qcom-ipq5018-tlmm-state" > + additionalProperties: false > + > +$defs: > + qcom-ipq5018-tlmm-state: > + type: object > + description: > + Pinctrl node's client devices use subnodes for desired pin configuration. > + Client device subnodes use below standard properties. > + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state > + > + properties: > + pins: > + description: > + List of gpio pins affected by the properties specified in this > + subnode. > + items: > + pattern: "^gpio([0-9]|[1-3][0-9]|4[0-6])$" > + minItems: 1 > + maxItems: 8 > + > + function: > + description: > + Specify the alternative function to be configured for the specified > + pins. > + > + enum: [ atest_char, audio_pdm0, audio_pdm1, audio_rxbclk, audio_rxd, > + audio_rxfsync, audio_rxmclk, audio_txbclk, audio_txd, > + audio_txfsync, audio_txmclk, blsp0_i2c, blsp0_spi, blsp0_uart0, > + blsp0_uart1, blsp1_i2c0, blsp1_i2c1, blsp1_spi0, blsp1_spi1, > + blsp1_uart0, blsp1_uart1, blsp1_uart2, blsp2_i2c0, blsp2_i2c1, > + blsp2_spi, blsp2_spi0, blsp2_spi1, btss, burn0, burn1, cri_trng, > + cri_trng0, cri_trng1, cxc_clk, cxc_data, dbg_out, eud_gpio, > + gcc_plltest, gcc_tlmm, gpio, led0, led2, mac0, mac1, mdc, mdio, > + pcie0_clk, pcie0_wake, pcie1_clk, pcie1_wake, pll_test, > + prng_rosc, pwm0, pwm1, pwm2, pwm3, qdss_cti_trig_in_a0, > + qdss_cti_trig_in_a1, qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, > + qdss_cti_trig_out_a0, qdss_cti_trig_out_a1, > + qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, qdss_traceclk_a, > + qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, > + qdss_tracedata_a, qdss_tracedata_b, qspi_clk, qspi_cs, > + qspi_data, reset_out, sdc1_clk, sdc1_cmd, sdc1_data, wci_txd, > + wci_rxd, wsa_swrm, wsi_clk3, wsi_data3, wsis_reset, xfem ] > + > + bias-pull-down: true > + bias-pull-up: true > + bias-disable: true > + drive-strength: true > + input-enable: true > + output-high: true > + output-low: true Drop all these 7, especially that input-enable is not allowed explicitly. > + > + required: > + - pins > + > + additionalProperties: false Instead: unevaluatedProperties: false and put it after the $ref above. Just like recent changes in the next. > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + tlmm: pinctrl@1000000 { > + compatible = "qcom,ipq5018-tlmm"; > + reg = <0x01000000 0x300000>; > + gpio-controller; > + #gpio-cells = <2>; > + gpio-ranges = <&tlmm 0 0 47>; > + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-controller; > + #interrupt-cells = <2>; > + > + uart2-state { > + pins = "gpio34", "gpio35"; > + function = "blsp2_uart"; Does not look like you tested the bindings. Please run `make dt_binding_check` (see Documentation/devicetree/bindings/writing-schema.rst for instructions). Best regards, Krzysztof
On 4/16/2023 2:35 PM, Krzysztof Kozlowski wrote: > On 14/04/2023 12:29, Sricharan Ramabadhran wrote: >> Add device tree binding Documentation details for ipq5018 >> pinctrl driver. >> > > Thank you for your patch. There is something to discuss/improve. > >> + >> + interrupt-controller: true >> + "#interrupt-cells": true >> + gpio-controller: true >> + "#gpio-cells": true >> + gpio-ranges: true >> + wakeup-parent: true >> + >> + gpio-reserved-ranges: >> + minItems: 1 >> + maxItems: 33 > > 24 > (you cannot have more than 24...) > ok, will change this. >> + >> + gpio-line-names: >> + maxItems: 47 >> + >> +patternProperties: >> + "-state$": >> + oneOf: >> + - $ref: "#/$defs/qcom-ipq5018-tlmm-state" >> + - patternProperties: >> + "-pins$": >> + $ref: "#/$defs/qcom-ipq5018-tlmm-state" >> + additionalProperties: false >> + >> +$defs: >> + qcom-ipq5018-tlmm-state: >> + type: object >> + description: >> + Pinctrl node's client devices use subnodes for desired pin configuration. >> + Client device subnodes use below standard properties. >> + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state >> + >> + properties: >> + pins: >> + description: >> + List of gpio pins affected by the properties specified in this >> + subnode. >> + items: >> + pattern: "^gpio([0-9]|[1-3][0-9]|4[0-6])$" >> + minItems: 1 >> + maxItems: 8 >> + >> + function: >> + description: >> + Specify the alternative function to be configured for the specified >> + pins. >> + >> + enum: [ atest_char, audio_pdm0, audio_pdm1, audio_rxbclk, audio_rxd, >> + audio_rxfsync, audio_rxmclk, audio_txbclk, audio_txd, >> + audio_txfsync, audio_txmclk, blsp0_i2c, blsp0_spi, blsp0_uart0, >> + blsp0_uart1, blsp1_i2c0, blsp1_i2c1, blsp1_spi0, blsp1_spi1, >> + blsp1_uart0, blsp1_uart1, blsp1_uart2, blsp2_i2c0, blsp2_i2c1, >> + blsp2_spi, blsp2_spi0, blsp2_spi1, btss, burn0, burn1, cri_trng, >> + cri_trng0, cri_trng1, cxc_clk, cxc_data, dbg_out, eud_gpio, >> + gcc_plltest, gcc_tlmm, gpio, led0, led2, mac0, mac1, mdc, mdio, >> + pcie0_clk, pcie0_wake, pcie1_clk, pcie1_wake, pll_test, >> + prng_rosc, pwm0, pwm1, pwm2, pwm3, qdss_cti_trig_in_a0, >> + qdss_cti_trig_in_a1, qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, >> + qdss_cti_trig_out_a0, qdss_cti_trig_out_a1, >> + qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, qdss_traceclk_a, >> + qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, >> + qdss_tracedata_a, qdss_tracedata_b, qspi_clk, qspi_cs, >> + qspi_data, reset_out, sdc1_clk, sdc1_cmd, sdc1_data, wci_txd, >> + wci_rxd, wsa_swrm, wsi_clk3, wsi_data3, wsis_reset, xfem ] >> + >> + bias-pull-down: true >> + bias-pull-up: true >> + bias-disable: true >> + drive-strength: true >> + input-enable: true >> + output-high: true >> + output-low: true > > Drop all these 7, especially that input-enable is not allowed explicitly. > ok. >> + >> + required: >> + - pins >> + >> + additionalProperties: false > > Instead: > unevaluatedProperties: false > and put it after the $ref above. Just like recent changes in the next. > ok, will check and fix it. >> + >> +required: >> + - compatible >> + - reg >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/interrupt-controller/arm-gic.h> >> + >> + tlmm: pinctrl@1000000 { >> + compatible = "qcom,ipq5018-tlmm"; >> + reg = <0x01000000 0x300000>; >> + gpio-controller; >> + #gpio-cells = <2>; >> + gpio-ranges = <&tlmm 0 0 47>; >> + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + >> + uart2-state { >> + pins = "gpio34", "gpio35"; >> + function = "blsp2_uart"; > > Does not look like you tested the bindings. Please run `make > dt_binding_check` (see > Documentation/devicetree/bindings/writing-schema.rst for instructions). I ran it against the TOT, will run it this time on nxt and post V4. Regards, Sricharan
On 17/04/2023 08:13, Sricharan Ramabadhran wrote: >>> + tlmm: pinctrl@1000000 { >>> + compatible = "qcom,ipq5018-tlmm"; >>> + reg = <0x01000000 0x300000>; >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + gpio-ranges = <&tlmm 0 0 47>; >>> + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + >>> + uart2-state { >>> + pins = "gpio34", "gpio35"; >>> + function = "blsp2_uart"; >> >> Does not look like you tested the bindings. Please run `make >> dt_binding_check` (see >> Documentation/devicetree/bindings/writing-schema.rst for instructions). > > I ran it against the TOT, will run it this time on nxt and post V4. I don't know what is TOT, but this would fail in every case on every tree. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml new file mode 100644 index 0000000..477d5df --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml @@ -0,0 +1,129 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5018-tlmm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ5018 TLMM pin controller + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> + +description: + Top Level Mode Multiplexer pin controller in Qualcomm IPQ5018 SoC. + +properties: + compatible: + const: qcom,ipq5018-tlmm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + "#interrupt-cells": true + gpio-controller: true + "#gpio-cells": true + gpio-ranges: true + wakeup-parent: true + + gpio-reserved-ranges: + minItems: 1 + maxItems: 33 + + gpio-line-names: + maxItems: 47 + +patternProperties: + "-state$": + oneOf: + - $ref: "#/$defs/qcom-ipq5018-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-ipq5018-tlmm-state" + additionalProperties: false + +$defs: + qcom-ipq5018-tlmm-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: "^gpio([0-9]|[1-3][0-9]|4[0-6])$" + minItems: 1 + maxItems: 8 + + function: + description: + Specify the alternative function to be configured for the specified + pins. + + enum: [ atest_char, audio_pdm0, audio_pdm1, audio_rxbclk, audio_rxd, + audio_rxfsync, audio_rxmclk, audio_txbclk, audio_txd, + audio_txfsync, audio_txmclk, blsp0_i2c, blsp0_spi, blsp0_uart0, + blsp0_uart1, blsp1_i2c0, blsp1_i2c1, blsp1_spi0, blsp1_spi1, + blsp1_uart0, blsp1_uart1, blsp1_uart2, blsp2_i2c0, blsp2_i2c1, + blsp2_spi, blsp2_spi0, blsp2_spi1, btss, burn0, burn1, cri_trng, + cri_trng0, cri_trng1, cxc_clk, cxc_data, dbg_out, eud_gpio, + gcc_plltest, gcc_tlmm, gpio, led0, led2, mac0, mac1, mdc, mdio, + pcie0_clk, pcie0_wake, pcie1_clk, pcie1_wake, pll_test, + prng_rosc, pwm0, pwm1, pwm2, pwm3, qdss_cti_trig_in_a0, + qdss_cti_trig_in_a1, qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, + qdss_cti_trig_out_a0, qdss_cti_trig_out_a1, + qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, qdss_traceclk_a, + qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, + qdss_tracedata_a, qdss_tracedata_b, qspi_clk, qspi_cs, + qspi_data, reset_out, sdc1_clk, sdc1_cmd, sdc1_data, wci_txd, + wci_rxd, wsa_swrm, wsi_clk3, wsi_data3, wsis_reset, xfem ] + + bias-pull-down: true + bias-pull-up: true + bias-disable: true + drive-strength: true + input-enable: true + output-high: true + output-low: true + + required: + - pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + tlmm: pinctrl@1000000 { + compatible = "qcom,ipq5018-tlmm"; + reg = <0x01000000 0x300000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&tlmm 0 0 47>; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + + uart2-state { + pins = "gpio34", "gpio35"; + function = "blsp2_uart"; + drive-strength = <8>; + bias-pull-down; + }; + };