| Message ID | 1686154687-29356-3-git-send-email-quic_krichai@quicinc.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [v2,1/3] dt-bindings: PCI: qcom: ep: Add interconnects path | expand |
On Wed, Jun 07, 2023 at 09:48:06PM +0530, Krishna chaitanya chundru wrote: > Add pcie-mem interconnect path to sdx55 target. > > Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> - Mani > --- > arch/arm/boot/dts/qcom-sdx55.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi > index 342c3d1..e9f8bfe 100644 > --- a/arch/arm/boot/dts/qcom-sdx55.dtsi > +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi > @@ -421,6 +421,10 @@ > <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "global", > "doorbell"; > + > + interconnects = <&system_noc MASTER_PCIE_0 0 &mc_virt SLAVE_EBI1 0>; > + interconnect-names = "pci-mem"; > + > resets = <&gcc GCC_PCIE_BCR>; > reset-names = "core"; > power-domains = <&gcc PCIE_GDSC>; > -- > 2.7.4 >
diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index 342c3d1..e9f8bfe 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -421,6 +421,10 @@ <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "global", "doorbell"; + + interconnects = <&system_noc MASTER_PCIE_0 0 &mc_virt SLAVE_EBI1 0>; + interconnect-names = "pci-mem"; + resets = <&gcc GCC_PCIE_BCR>; reset-names = "core"; power-domains = <&gcc PCIE_GDSC>;
Add pcie-mem interconnect path to sdx55 target. Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> --- arch/arm/boot/dts/qcom-sdx55.dtsi | 4 ++++ 1 file changed, 4 insertions(+)