From patchwork Mon Jan 8 15:27:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 13513609 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A192552F69; Mon, 8 Jan 2024 15:28:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="dDp+wKIx" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 408EgTQW004108; Mon, 8 Jan 2024 15:28:12 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=qcppdkim1; bh=Rk3s+ZKkG8f4jny9WLfJ mdwaQs4xH0BELyDFpvnE3sU=; b=dDp+wKIxWSd2jKzkzxZ4iHtEfq081Q5iCXgK syaqIriMcqJSmrKiyodmFZPa9ufF2pawQ496DQT8CXbrFnxNrRiqCPzCujl9DPPp 4V7YklgCWWnf2NIl31+4gKeO1yeyuj35fsSg9EI+4DxwWthRNidf9IXd6hJNX6Eu 33Rsldgnqqn1hfDfp1VnBdO9KfeH53/JCvl1aTRuqTVH7MtkPKAIoyomz2f3R50G rvvZt5KLpuMWJiw/WFbrgxo2LsL9pncWwqnzkznjarqrBBPkrfaGUk7OODbUOAvn c4MGI3nxhicZOy+RsAqfFFtpm6vmOYrmot5HHIbpawLyPO3Yiw== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3vg97b1ad8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 08 Jan 2024 15:28:12 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 408FSBGf012691 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 8 Jan 2024 15:28:11 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 8 Jan 2024 07:28:09 -0800 From: Mukesh Ojha To: , , CC: , , , Mukesh Ojha Subject: [PATCH v11 4/4] pinctrl: qcom: Use qcom_scm_io_rmw() function Date: Mon, 8 Jan 2024 20:57:34 +0530 Message-ID: <1704727654-13999-5-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1704727654-13999-1-git-send-email-quic_mojha@quicinc.com> References: <1704727654-13999-1-git-send-email-quic_mojha@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 9rSUidQQ7DWNtP-cs_OWqNNuSAqKj_Hd X-Proofpoint-ORIG-GUID: 9rSUidQQ7DWNtP-cs_OWqNNuSAqKj_Hd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_02,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 phishscore=0 clxscore=1015 mlxscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 mlxlogscore=748 suspectscore=0 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2401080132 Use qcom_scm_io_rmw() exported function in pinctrl-msm driver. Signed-off-by: Mukesh Ojha Acked-by: Linus Walleij --- drivers/pinctrl/qcom/pinctrl-msm.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index aeaf0d1958f5..1bd5c8c43fcd 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1082,22 +1082,20 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) if (g->intr_target_width) intr_target_mask = GENMASK(g->intr_target_width - 1, 0); + intr_target_mask <<= g->intr_target_bit; if (pctrl->intr_target_use_scm) { u32 addr = pctrl->phys_base[0] + g->intr_target_reg; int ret; - qcom_scm_io_readl(addr, &val); - val &= ~(intr_target_mask << g->intr_target_bit); - val |= g->intr_target_kpss_val << g->intr_target_bit; - - ret = qcom_scm_io_writel(addr, val); + val = g->intr_target_kpss_val << g->intr_target_bit; + ret = qcom_scm_io_rmw(addr, intr_target_mask, val); if (ret) dev_err(pctrl->dev, "Failed routing %lu interrupt to Apps proc", d->hwirq); } else { val = msm_readl_intr_target(pctrl, g); - val &= ~(intr_target_mask << g->intr_target_bit); + val &= ~intr_target_mask; val |= g->intr_target_kpss_val << g->intr_target_bit; msm_writel_intr_target(val, pctrl, g); }