Message ID | 1705634583-17631-10-git-send-email-quic_taozha@quicinc.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | [v4,01/10] coresight-tpdm: Optimize the store function of tpdm simple dataset | expand |
On 19/01/2024 04:23, Tao Zhang wrote: > Add property "qcom,cmb_msr_num" to support CMB MSR(mux select register) > for TPDM. It specifies the number of CMB MSR registers supported by > the TDPM. Please use subject prefixes matching the subsystem. You can get them for example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory your patch is touching. Missing "qcom,coresight-tpdm:" prefix. With this fixed: Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml index 507a5f887097..75190318b253 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml @@ -70,6 +70,15 @@ properties: minimum: 0 maximum: 32 + qcom,cmb-msrs-num: + description: + Specifies the number of CMB MSR(mux select register) registers supported + by the monitor. If this property is not configured or set to 0, it means + this TPDM doesn't support CMB MSR. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 32 + clocks: maxItems: 1 @@ -124,6 +133,7 @@ examples: reg = <0x06c29000 0x1000>; qcom,cmb-element-size = /bits/ 8 <64>; + qcom,cmb-msrs-num = <32>; clocks = <&aoss_qmp>; clock-names = "apb_pclk";