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Tue, 30 Apr 2024 16:31:55 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 43UGVtAv003693; Tue, 30 Apr 2024 16:31:55 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-msarkar-hyd.qualcomm.com [10.213.111.194]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 43UGVtjA003692; Tue, 30 Apr 2024 16:31:55 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3891782) id CBF0B2287; Tue, 30 Apr 2024 22:01:54 +0530 (+0530) From: Mrinmay Sarkar To: andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, manivannan.sadhasivam@linaro.org Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_schintav@quicinc.com, Mrinmay Sarkar , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/2] arm64: dts: qcom: sa8775p: Adding iommus property in pcie DT nodes Date: Tue, 30 Apr 2024 22:01:50 +0530 Message-Id: <1714494711-10322-2-git-send-email-quic_msarkar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1714494711-10322-1-git-send-email-quic_msarkar@quicinc.com> References: <1714494711-10322-1-git-send-email-quic_msarkar@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: qvNGy0O7bEYfPFxgDqASkWCNr5F8V5jv X-Proofpoint-ORIG-GUID: qvNGy0O7bEYfPFxgDqASkWCNr5F8V5jv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-04-30_09,2024-04-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 adultscore=0 clxscore=1015 mlxscore=0 suspectscore=0 malwarescore=0 impostorscore=0 lowpriorityscore=0 mlxlogscore=999 spamscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2404300118 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: 'iommus' is a list of phandle and IOMMU specifier pairs that describe the IOMMU master interfaces of the device. Specified this property in PCIe DT nodes so that IOMMU can be used for address translation. Signed-off-by: Mrinmay Sarkar --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 9065645..0c52180 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -3666,6 +3666,7 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_0 0>; interconnect-names = "pcie-mem", "cpu-pcie"; + iommus = <&pcie_smmu 0x0000 0x7f>; iommu-map = <0x0 &pcie_smmu 0x0000 0x1>, <0x100 &pcie_smmu 0x0001 0x1>; @@ -3822,6 +3823,7 @@ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_PCIE_1 0>; interconnect-names = "pcie-mem", "cpu-pcie"; + iommus = <&pcie_smmu 0x0080 0x7f>; iommu-map = <0x0 &pcie_smmu 0x0080 0x1>, <0x100 &pcie_smmu 0x0081 0x1>;