From patchwork Wed Mar 1 17:42:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 9598851 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6356F60429 for ; Wed, 1 Mar 2017 17:43:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5B303281DB for ; Wed, 1 Mar 2017 17:43:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4FD9B2837F; Wed, 1 Mar 2017 17:43:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EB681281DB for ; Wed, 1 Mar 2017 17:43:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752859AbdCARnR (ORCPT ); Wed, 1 Mar 2017 12:43:17 -0500 Received: from mail-qk0-f193.google.com ([209.85.220.193]:34223 "EHLO mail-qk0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752855AbdCARnQ (ORCPT ); Wed, 1 Mar 2017 12:43:16 -0500 Received: by mail-qk0-f193.google.com with SMTP id s186so12534211qkb.1 for ; Wed, 01 Mar 2017 09:43:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LspO+kNJ8ivFRXROC0ssQ9K832kcjQIpN+13hSdnYvY=; b=GLz0QLOU9I7OauSarnDx++VW+gUQdle5e8Pt7H75gbLJX/Mquzpf7pvFslbMnGbq20 gBGML67cCTwNkeA2kmPyUl+QHZbGimIeVn36ZzTswDwTNn7LzsGxBwKluHR+A2bDumOq 7hELMgc/CyNJJhwvP3fwJ4XxRQm8kaqGPQRDa1NrWtPA2qS7a8i0YgriXDmdeDJ0suId OrHYyGAlTAh3ozzjJ55vmpfuYbvIuFXwWH7NdFGvsbYf4QwzZDTgpsNObVMkTJ8amDmf rNsbRsPocyzJbnjIRX4v9kFXI3ZKYRnyDt5pOB78z2itB8dud6U1ERZP9EwpTTP8vaXv 0/Pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LspO+kNJ8ivFRXROC0ssQ9K832kcjQIpN+13hSdnYvY=; b=gREx2vKkXHsJO3vFRXVd8WaIq1MVaou6NnOBlm0hHS6Nv9Jv/9bTjatK+xCx4Nod9A kc7EEvvi2LXj845dKpFbei3rWXpr6Cml4s7ECU9wfY3AJOpeWX47N2m4mrwF4VpNgppu gGErGYOsJioiE+huW0rOaaHlQApwrE2mr23SQ0iPfHuNzswRLD4GVZEIt0dFOzN0lNCb P9S7sJCb/NF+4XHZP4MMWWh70PlT3GqLWa1Y7Nvvfz+H4wmnEiz+nWceeLGH2kRHJFrl 9Pc50DclQTJLRZEVd3N9yiE8j4hqXvJE+IX0GisFa6aen6Gpzi+BVgZG59Iew1sE4TJK 3Suw== X-Gm-Message-State: AMke39kEffX7xP4KxAikK/SfhrQQDP8l1DPFxuJmR9OCZvOwdJdkSoLqA5/XNaGvgiaOPg== X-Received: by 10.55.42.88 with SMTP id q85mr11496457qkh.135.1488390195418; Wed, 01 Mar 2017 09:43:15 -0800 (PST) Received: from localhost ([2601:184:4780:aac0:25f8:dd96:a084:785a]) by smtp.gmail.com with ESMTPSA id u5sm3582142qkd.46.2017.03.01.09.43.14 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 01 Mar 2017 09:43:14 -0800 (PST) From: Rob Clark To: iommu@lists.linux-foundation.org Cc: linux-arm-msm@vger.kernel.org, Robin Murphy , Will Deacon , Sricharan , Mark Rutland , Stanimir Varbanov , Rob Clark Subject: [PATCH 1/9] firmware/qcom: add qcom_scm_restore_sec_cfg() Date: Wed, 1 Mar 2017 12:42:50 -0500 Message-Id: <20170301174258.14618-2-robdclark@gmail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170301174258.14618-1-robdclark@gmail.com> References: <20170301174258.14618-1-robdclark@gmail.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Rob Clark --- drivers/firmware/qcom_scm-32.c | 6 ++++++ drivers/firmware/qcom_scm-64.c | 16 ++++++++++++++++ drivers/firmware/qcom_scm.c | 6 ++++++ drivers/firmware/qcom_scm.h | 5 +++++ include/linux/qcom_scm.h | 2 ++ 5 files changed, 35 insertions(+) diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c index 8ad226c..722e65a 100644 --- a/drivers/firmware/qcom_scm-32.c +++ b/drivers/firmware/qcom_scm-32.c @@ -578,3 +578,9 @@ int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id) return ret ? : le32_to_cpu(scm_ret); } + +int __qcom_scm_restore_sec_cfg(struct device *dev, u32 device_id, + u32 spare) +{ + return -ENODEV; +} diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c index c933259..550e3a3 100644 --- a/drivers/firmware/qcom_scm-64.c +++ b/drivers/firmware/qcom_scm-64.c @@ -381,3 +381,19 @@ int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id) return ret ? : res.a1; } + +int __qcom_scm_restore_sec_cfg(struct device *dev, u32 device_id, u32 spare) +{ + struct qcom_scm_desc desc = {0}; + struct arm_smccc_res res; + int ret; + + desc.args[0] = device_id; + desc.args[1] = spare; + desc.arginfo = QCOM_SCM_ARGS(2); + + ret = qcom_scm_call(dev, QCOM_SCM_SVC_MP, QCOM_SCM_RESTORE_SEC_CFG, + &desc, &res); + + return ret ? : res.a1; +} diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index d987bcc..ae1f473 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -315,6 +315,12 @@ static const struct reset_control_ops qcom_scm_pas_reset_ops = { .deassert = qcom_scm_pas_reset_deassert, }; +int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare) +{ + return __qcom_scm_restore_sec_cfg(__scm->dev, device_id, spare); +} +EXPORT_SYMBOL(qcom_scm_restore_sec_cfg); + /** * qcom_scm_is_available() - Checks if SCM is available */ diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h index 6a0f154..31fc732 100644 --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h @@ -85,4 +85,9 @@ static inline int qcom_scm_remap_error(int err) return -EINVAL; } +#define QCOM_SCM_SVC_MP 0xc +#define QCOM_SCM_RESTORE_SEC_CFG 2 +extern int __qcom_scm_restore_sec_cfg(struct device *dev, u32 device_id, + u32 spare); + #endif diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h index d32f6f1..22017f5d 100644 --- a/include/linux/qcom_scm.h +++ b/include/linux/qcom_scm.h @@ -40,6 +40,7 @@ extern int qcom_scm_pas_shutdown(u32 peripheral); extern void qcom_scm_cpu_power_down(u32 flags); extern u32 qcom_scm_get_version(void); extern int qcom_scm_set_remote_state(u32 state, u32 id); +extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare); #else static inline int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus) @@ -67,5 +68,6 @@ static inline void qcom_scm_cpu_power_down(u32 flags) {} static inline u32 qcom_scm_get_version(void) { return 0; } static inline u32 qcom_scm_set_remote_state(u32 state,u32 id) { return -ENODEV; } +static inline int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare) { return -ENODEV; } #endif #endif