From patchwork Mon Mar 20 22:36:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 9635387 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4DC9360132 for ; Mon, 20 Mar 2017 22:36:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3D72527165 for ; Mon, 20 Mar 2017 22:36:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2EC9D277D9; Mon, 20 Mar 2017 22:36:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 11AA727165 for ; Mon, 20 Mar 2017 22:36:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753819AbdCTWgS (ORCPT ); Mon, 20 Mar 2017 18:36:18 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:36992 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753218AbdCTWgS (ORCPT ); Mon, 20 Mar 2017 18:36:18 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A7C2B60860; Mon, 20 Mar 2017 22:36:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1490049376; bh=l1n2s34vVF11mZFx0sItNsKDkLGQ9v8a8adrUEe4nlU=; h=From:To:Cc:Subject:Date:From; b=XDZRQkq9uymtyf7MPl/46pMjLps1JAURa2n9suImyO2Ip5qZ2Xeo2Kq8dy6/s1WbO 24aCONmcPLetJLlhuO6C9n9vHomrrvB8gqOLF6/EincK5Gbd4Yy3qtCXxJ02db4FDA i3qm3e2YJUFGHK8cNyolI5xk05gGGNJXVNOMNJYE= Received: from sboyd-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sboyd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 78C9D60860; Mon, 20 Mar 2017 22:36:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1490049375; bh=l1n2s34vVF11mZFx0sItNsKDkLGQ9v8a8adrUEe4nlU=; h=From:To:Cc:Subject:Date:From; b=C+c0l0ftz7Ct6calm3cKl3zWF/dEMiHT07T1iil7jKCTOpojY9dvxkWmrC75sn3/F aWR/BnkDev1v8TaRgrE3s6sbW+G5YNdHE9NDgKrqdhnkvDADnAgW2Ja+zVZQjJJ2+Y 8kE80vfG34ET3YgmJxIO7DWzlGZhWluRO2namJyI= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 78C9D60860 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org From: Stephen Boyd To: Thomas Gleixner , Jason Cooper , Marc Zyngier Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Srinivas Kandagatla Subject: [PATCH] irqchip/gic-v3: Support v2m frame backwards compatibility mode Date: Mon, 20 Mar 2017 15:36:14 -0700 Message-Id: <20170320223614.1351-1-sboyd@codeaurora.org> X-Mailer: git-send-email 2.12.0.264.gd6db3f216544 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some GIC configurations don't have an ITS or v2m frame, but they want to support MSIs through the distributor's "v2m backwards compatible" mode. This mode allows software written for the v2m to treat the distributor as the only frame and support a limited number of MSIs through a direct write to the same register offset (0x40) as what exists in v2m. Support this mode of operation by detecting if a gicv3 device node has the "msi-controller" property, and then probe the v2m frame code on top of the distributor base. Rely on existing v2m DT properties to tell us about the number of SPIs and where they start from because the GICD_TYPER register doesn't tell us this information. Cc: Srinivas Kandagatla Signed-off-by: Stephen Boyd --- drivers/irqchip/irq-gic-v2m.c | 66 ++++++++++++++++++++++++---------- drivers/irqchip/irq-gic-v3.c | 4 +++ include/linux/irqchip/arm-gic-common.h | 3 ++ 3 files changed, 54 insertions(+), 19 deletions(-) diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c index 863e073c6f7f..4e0d3493c510 100644 --- a/drivers/irqchip/irq-gic-v2m.c +++ b/drivers/irqchip/irq-gic-v2m.c @@ -26,6 +26,7 @@ #include #include #include +#include /* * MSI_TYPER: @@ -388,6 +389,36 @@ static struct of_device_id gicv2m_device_id[] = { {}, }; +static int __init giv2m_of_init_one(struct device_node *child, bool force) +{ + u32 spi_start = 0, nr_spis = 0; + struct resource res; + int ret; + + if (!of_find_property(child, "msi-controller", NULL)) + return force ? -EINVAL : 0; + + ret = of_address_to_resource(child, 0, &res); + if (ret) { + pr_err("Failed to allocate v2m resource\n"); + return ret; + } + + if (!of_property_read_u32(child, "arm,msi-base-spi", + &spi_start) && + !of_property_read_u32(child, "arm,msi-num-spis", &nr_spis)) + if (!force) + pr_info("DT overriding V2M MSI_TYPER (base:%u, num:%u)\n", + spi_start, nr_spis); + + if (force && !nr_spis) { + pr_err("Can't emulate v2m without num-spis\n"); + return -EINVAL; + } + + return gicv2m_init_one(&child->fwnode, spi_start, nr_spis, &res); +} + static int __init gicv2m_of_init(struct fwnode_handle *parent_handle, struct irq_domain *parent) { @@ -397,25 +428,7 @@ static int __init gicv2m_of_init(struct fwnode_handle *parent_handle, for (child = of_find_matching_node(node, gicv2m_device_id); child; child = of_find_matching_node(child, gicv2m_device_id)) { - u32 spi_start = 0, nr_spis = 0; - struct resource res; - - if (!of_find_property(child, "msi-controller", NULL)) - continue; - - ret = of_address_to_resource(child, 0, &res); - if (ret) { - pr_err("Failed to allocate v2m resource.\n"); - break; - } - - if (!of_property_read_u32(child, "arm,msi-base-spi", - &spi_start) && - !of_property_read_u32(child, "arm,msi-num-spis", &nr_spis)) - pr_info("DT overriding V2M MSI_TYPER (base:%u, num:%u)\n", - spi_start, nr_spis); - - ret = gicv2m_init_one(&child->fwnode, spi_start, nr_spis, &res); + ret = giv2m_of_init_one(child, false); if (ret) { of_node_put(child); break; @@ -518,6 +531,21 @@ static int __init gicv2m_acpi_init(struct irq_domain *parent) } #endif /* CONFIG_ACPI */ +int __init gicv2m_init_gicv3(struct fwnode_handle *handle, + struct irq_domain *parent) +{ + int ret; + struct device_node *node = to_of_node(handle); + + ret = giv2m_of_init_one(node, true); + if (!ret) + ret = gicv2m_allocate_domains(parent); + if (ret) + gicv2m_teardown(); + + return ret; +} + int __init gicv2m_init(struct fwnode_handle *parent_handle, struct irq_domain *parent) { diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 6c65eb917db6..9051d889c23e 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -1170,6 +1170,10 @@ static int __init gic_of_init(struct device_node *node, struct device_node *pare gic_populate_ppi_partitions(node); gic_of_setup_kvm_info(node); + + if (IS_ENABLED(CONFIG_ARM_GIC_V2M)) + gicv2m_init_gicv3(&node->fwnode, gic_data.domain); + return 0; out_unmap_rdist: diff --git a/include/linux/irqchip/arm-gic-common.h b/include/linux/irqchip/arm-gic-common.h index c647b0547bcd..43207a0cbd39 100644 --- a/include/linux/irqchip/arm-gic-common.h +++ b/include/linux/irqchip/arm-gic-common.h @@ -31,4 +31,7 @@ struct gic_kvm_info { const struct gic_kvm_info *gic_get_kvm_info(void); +int gicv2m_init_gicv3(struct fwnode_handle *parent_handle, + struct irq_domain *parent); + #endif /* __LINUX_IRQCHIP_ARM_GIC_COMMON_H */