From patchwork Tue Aug 15 00:38:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenglin Wu X-Patchwork-Id: 9900417 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 108FA603FB for ; Tue, 15 Aug 2017 00:42:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 033492877E for ; Tue, 15 Aug 2017 00:42:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EC14528790; Tue, 15 Aug 2017 00:42:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EA97728791 for ; Tue, 15 Aug 2017 00:42:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752806AbdHOAlf (ORCPT ); Mon, 14 Aug 2017 20:41:35 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:40600 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752815AbdHOAle (ORCPT ); Mon, 14 Aug 2017 20:41:34 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 7442960346; Tue, 15 Aug 2017 00:41:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1502757693; bh=aqr+58MrEP305OTjtn38/SpYBW6RVC9uI+LAKH1ehC0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=o/yO8Ue8uS+RAjraw7eF4XZvfMMcGk+TH3M1UmMFDeHkU6Lq2tLLDxNDKw3DKTRRa wGZtfHOcgYv+Pt4YSU/9A7rwMmIgYy2tx04+4FZRgvNJanN1NmBYz9cQjJB+NYnplL G3hv3xg31hG2sqMrJTkagjxa1geIIT6sQ6Ou0f4g= Received: from FENGLINW.ap.qualcomm.com (unknown [180.166.53.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: fenglinw@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4A5EA6028C; Tue, 15 Aug 2017 00:41:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1502757693; bh=aqr+58MrEP305OTjtn38/SpYBW6RVC9uI+LAKH1ehC0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=o/yO8Ue8uS+RAjraw7eF4XZvfMMcGk+TH3M1UmMFDeHkU6Lq2tLLDxNDKw3DKTRRa wGZtfHOcgYv+Pt4YSU/9A7rwMmIgYy2tx04+4FZRgvNJanN1NmBYz9cQjJB+NYnplL G3hv3xg31hG2sqMrJTkagjxa1geIIT6sQ6Ou0f4g= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 4A5EA6028C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=fenglinw@codeaurora.org From: fenglinw@codeaurora.org To: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, bjorn.andersson@linaro.org, Linus Walleij , Rob Herring , Mark Rutland , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: collinsd@codeaurora.org, aghayal@codeaurora.org, wruan@codeaurora.org, kgunda@codeaurora.org, Fenglin Wu Subject: [PATCH V3 2/2] pinctrl: qcom: spmi-gpio: Add dtest route for digital input Date: Tue, 15 Aug 2017 08:38:38 +0800 Message-Id: <20170815003918.8332-3-fenglinw@codeaurora.org> X-Mailer: git-send-email 2.13.0.windows.1 In-Reply-To: <20170815003918.8332-1-fenglinw@codeaurora.org> References: <20170815003918.8332-1-fenglinw@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Fenglin Wu Add property "qcom,dtest-buffer" to specify which dtest rail to feed when the pin is configured as a digital input. Signed-off-by: Fenglin Wu Acked-by: Rob Herring Acked-by: Bjorn Andersson --- .../devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 7 +++ drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 50 ++++++++++++++++++++++ 2 files changed, 57 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt index d9d2054..f4cf24f 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt @@ -198,6 +198,13 @@ to specify in a pin configuration subnode: in analog-pass-through mode. Valid values are 1-4 corresponding to ATEST1 to ATEST4. +- qcom,dtest-buffer: + Usage: optional + Value type: + Definition: Selects DTEST rail to route to GPIO when it's configured + as digital input. + Valid values are 1-4 corresponding to DTEST1 to DTEST4. + Example: pm8921_gpio: gpio@150 { diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index 6b21832..73ce2b5 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c @@ -51,6 +51,7 @@ #define PMIC_GPIO_REG_DIG_VIN_CTL 0x41 #define PMIC_GPIO_REG_DIG_PULL_CTL 0x42 #define PMIC_GPIO_REG_LV_MV_DIG_OUT_SOURCE_CTL 0x44 +#define PMIC_GPIO_REG_DIG_IN_CTL 0x43 #define PMIC_GPIO_REG_DIG_OUT_CTL 0x45 #define PMIC_GPIO_REG_EN_CTL 0x46 #define PMIC_GPIO_REG_LV_MV_ANA_PASS_THRU_SEL 0x4A @@ -84,6 +85,11 @@ #define PMIC_GPIO_LV_MV_OUTPUT_INVERT_SHIFT 7 #define PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK 0xF +/* PMIC_GPIO_REG_DIG_IN_CTL */ +#define PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN 0x80 +#define PMIC_GPIO_LV_MV_DIG_IN_DTEST_SEL_MASK 0x7 +#define PMIC_GPIO_DIG_IN_DTEST_SEL_MASK 0xf + /* PMIC_GPIO_REG_DIG_OUT_CTL */ #define PMIC_GPIO_REG_OUT_STRENGTH_SHIFT 0 #define PMIC_GPIO_REG_OUT_STRENGTH_MASK 0x3 @@ -111,6 +117,7 @@ #define PMIC_GPIO_CONF_STRENGTH (PIN_CONFIG_END + 2) #define PMIC_GPIO_CONF_ATEST (PIN_CONFIG_END + 3) #define PMIC_GPIO_CONF_ANALOG_PASS (PIN_CONFIG_END + 4) +#define PMIC_GPIO_CONF_DTEST_BUFFER (PIN_CONFIG_END + 5) /* The index of each function in pmic_gpio_functions[] array */ enum pmic_gpio_func_index { @@ -145,6 +152,7 @@ enum pmic_gpio_func_index { * @strength: No, Low, Medium, High * @function: See pmic_gpio_functions[] * @atest: the ATEST selection for GPIO analog-pass-through mode + * @dtest_buffer: the DTEST buffer selection for digital input mode. */ struct pmic_gpio_pad { u16 base; @@ -163,6 +171,7 @@ struct pmic_gpio_pad { unsigned int strength; unsigned int function; unsigned int atest; + unsigned int dtest_buffer; }; struct pmic_gpio_state { @@ -177,6 +186,7 @@ struct pmic_gpio_state { {"qcom,drive-strength", PMIC_GPIO_CONF_STRENGTH, 0}, {"qcom,atest", PMIC_GPIO_CONF_ATEST, 0}, {"qcom,analog-pass", PMIC_GPIO_CONF_ANALOG_PASS, 0}, + {"qcom,dtest-buffer", PMIC_GPIO_CONF_DTEST_BUFFER, 0}, }; #ifdef CONFIG_DEBUG_FS @@ -185,6 +195,7 @@ struct pmic_gpio_state { PCONFDUMP(PMIC_GPIO_CONF_STRENGTH, "drive-strength", NULL, true), PCONFDUMP(PMIC_GPIO_CONF_ATEST, "atest", NULL, true), PCONFDUMP(PMIC_GPIO_CONF_ANALOG_PASS, "analog-pass", NULL, true), + PCONFDUMP(PMIC_GPIO_CONF_DTEST_BUFFER, "dtest-buffer", NULL, true), }; #endif @@ -420,6 +431,9 @@ static int pmic_gpio_config_get(struct pinctrl_dev *pctldev, case PMIC_GPIO_CONF_ANALOG_PASS: arg = pad->analog_pass; break; + case PMIC_GPIO_CONF_DTEST_BUFFER: + arg = pad->dtest_buffer; + break; default: return -EINVAL; } @@ -504,6 +518,11 @@ static int pmic_gpio_config_set(struct pinctrl_dev *pctldev, unsigned int pin, return -EINVAL; pad->analog_pass = true; break; + case PMIC_GPIO_CONF_DTEST_BUFFER: + if (arg > 4) + return -EINVAL; + pad->dtest_buffer = arg; + break; default: return -EINVAL; } @@ -528,6 +547,20 @@ static int pmic_gpio_config_set(struct pinctrl_dev *pctldev, unsigned int pin, if (ret < 0) return ret; + if (pad->dtest_buffer == 0) { + val = 0; + } else { + if (pad->lv_mv_type) { + val = pad->dtest_buffer - 1; + val |= PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN; + } else { + val = BIT(pad->dtest_buffer - 1); + } + } + ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_DIG_IN_CTL, val); + if (ret < 0) + return ret; + if (pad->analog_pass) val = PMIC_GPIO_MODE_ANALOG_PASS_THRU; else if (pad->output_enabled && pad->input_enabled) @@ -627,6 +660,7 @@ static void pmic_gpio_config_dbg_show(struct pinctrl_dev *pctldev, seq_printf(s, " %-4s", pad->out_value ? "high" : "low"); seq_printf(s, " %-7s", strengths[pad->strength]); seq_printf(s, " atest-%d", pad->atest); + seq_printf(s, " dtest-%d", pad->dtest_buffer); } } @@ -845,6 +879,22 @@ static int pmic_gpio_populate(struct pmic_gpio_state *state, pad->pullup = val >> PMIC_GPIO_REG_PULL_SHIFT; pad->pullup &= PMIC_GPIO_REG_PULL_MASK; + val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_DIG_IN_CTL); + if (val < 0) + return val; + + if (pad->lv_mv_type && (val & PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN)) + pad->dtest_buffer = + (val & PMIC_GPIO_LV_MV_DIG_IN_DTEST_SEL_MASK) + 1; + else if (!pad->lv_mv_type) + pad->dtest_buffer = ffs(val); + else + pad->dtest_buffer = 0; + + val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_DIG_OUT_CTL); + if (val < 0) + return val; + pad->strength = val >> PMIC_GPIO_REG_OUT_STRENGTH_SHIFT; pad->strength &= PMIC_GPIO_REG_OUT_STRENGTH_MASK;