From patchwork Fri Oct 13 06:15:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenglin Wu X-Patchwork-Id: 10003525 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BFF9660325 for ; Fri, 13 Oct 2017 06:17:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B11EB28D28 for ; Fri, 13 Oct 2017 06:17:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A461C28C37; Fri, 13 Oct 2017 06:17:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3612D28C37 for ; Fri, 13 Oct 2017 06:17:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751414AbdJMGRn (ORCPT ); Fri, 13 Oct 2017 02:17:43 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:43482 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751373AbdJMGRm (ORCPT ); Fri, 13 Oct 2017 02:17:42 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id D31376070A; Fri, 13 Oct 2017 06:17:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1507875461; bh=3APww8O0zDWMkhssSle1Uxu03DA+EePU+sQl3itxemk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bvBvneiV/IBtEdLzot86StYdvLItTwZELsbuB20rI1JHU5BumJZdxAEdjon/xObI/ koWIAopQwwG6ffcAFZ36qIOwJ4+VWcczHyy37rocBV4/Uu8zdAxOLN1IgNjGCtG146 evsxodUzV1O1aBjiY78QyojLao7QENseOP+f3gTY= Received: from FENGLINW.ap.qualcomm.com (unknown [180.166.53.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: fenglinw@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id A78D36014C; Fri, 13 Oct 2017 06:17:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1507875461; bh=3APww8O0zDWMkhssSle1Uxu03DA+EePU+sQl3itxemk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bvBvneiV/IBtEdLzot86StYdvLItTwZELsbuB20rI1JHU5BumJZdxAEdjon/xObI/ koWIAopQwwG6ffcAFZ36qIOwJ4+VWcczHyy37rocBV4/Uu8zdAxOLN1IgNjGCtG146 evsxodUzV1O1aBjiY78QyojLao7QENseOP+f3gTY= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org A78D36014C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=fenglinw@codeaurora.org From: fenglinw@codeaurora.org To: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Andersson , Linus Walleij , linux-gpio@vger.kernel.org Cc: collinsd@codeaurora.org, aghayal@codeaurora.org, wruan@codeaurora.org, subbaram@codeaurora.org, kgunda@codeaurora.org, Fenglin Wu Subject: [PATCH V1 2/2] pinctrl: qcom: spmi-gpio: Set is_enabled flag in set_mux() Date: Fri, 13 Oct 2017 14:15:04 +0800 Message-Id: <20171013061550.996-3-fenglinw@codeaurora.org> X-Mailer: git-send-email 2.13.0.windows.1 In-Reply-To: <20171013061550.996-1-fenglinw@codeaurora.org> References: <20171013061550.996-1-fenglinw@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Fenglin Wu The initial value of is_enabled flag is read out from hardware in pmic_gpio_populate(), and it will be set in pmic_gpio_config_set() if pinconf is defined. For any GPIOs disabled initially in hardware which only have pinmux defined, they won't be enabled in pmic_gpio_set_mux() calling. So set is_enabled flag in set_mux() to ensure the GPIO module could be enabled in above case. Signed-off-by: Fenglin Wu --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index 0a1e173..219c934 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c @@ -312,6 +312,7 @@ static int pmic_gpio_set_mux(struct pinctrl_dev *pctldev, unsigned function, } pad = pctldev->desc->pins[pin].drv_data; + pad->is_enabled = true; /* * Non-LV/MV subtypes only support 2 special functions, * offsetting the dtestx function values by 2