From patchwork Fri Oct 27 10:57:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Archit Taneja X-Patchwork-Id: 10029617 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CC1E9602D6 for ; Fri, 27 Oct 2017 10:57:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BC05828F4C for ; Fri, 27 Oct 2017 10:57:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B0D7E28F52; Fri, 27 Oct 2017 10:57:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 36D6828F4C for ; Fri, 27 Oct 2017 10:57:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752558AbdJ0K55 (ORCPT ); Fri, 27 Oct 2017 06:57:57 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:40544 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752547AbdJ0K55 (ORCPT ); Fri, 27 Oct 2017 06:57:57 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 8C4F860B0E; Fri, 27 Oct 2017 10:57:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1509101876; bh=mpoL4P/dJmE9nnRriBW0UZffneKmgnjmwWs4/pQ5YPE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CAxu33mXiW6zWWoHgIV9LcV2Tzmb/u78Oy9TMiIF69u+8RrjOjfEfMk/TkV66OYCT ZtxwsiENt5Q5N4fGOPzPII82s6jpyBSKIkA43VZhu7lcbGml2/kv9tOI5PIibpnca/ Kr5T2WjkEsKd7IvCy7VQsBFcjS06q9afAuiY5cmQ= Received: from localhost (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: architt@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 99EE060AD7; Fri, 27 Oct 2017 10:57:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1509101870; bh=mpoL4P/dJmE9nnRriBW0UZffneKmgnjmwWs4/pQ5YPE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mYO58GlZtPl3GQglP3n8yXi6+74OkB9jYpC1i+nF569gNYSILMBOMAZjZrUHs395D 9hRC3AqzNm43F4vRTpDnIEmwIwV+gGIdriem2svq62cfd0XwQww4axCGq0lzsQ7KGK iHn41SCgnuDBxCAyDKs3E2MRuz3vnFN4iXt2Zm7w= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 99EE060AD7 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=architt@codeaurora.org From: Archit Taneja To: robdclark@gmail.com Cc: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Archit Taneja Subject: [PATCH 4/6] drm/msm/mdp5: Update mdp5_pipe_assign to spit out both planes Date: Fri, 27 Oct 2017 16:27:30 +0530 Message-Id: <20171027105732.19235-5-architt@codeaurora.org> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20171027105732.19235-1-architt@codeaurora.org> References: <20171027105732.19235-1-architt@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We currently call mdp5_pipe_assign() twice to assign the left and right hwpipes for our drm_plane. When merging 2 hwpipes, there are a few constraints that we need to keep in mind: - Only the same types of SSPPs are preferred. I.e, a RGB pipe should be paired with another RGB pipe, VIG with VIG etc. - The hwpipe staged on the left should have a higher priority than the hwpipe staged on the right. The priorities are as follows: VIG0 > VIG1 > VIG2 > VIG3 RGB0 > RGB1 > RGB2 > RGB3 DMA0 > DMA1 We can't apply these constraints easily if mdp5_pipe_assign() is called twice. Update mdp5_pipe_assign() to find both hwpipes in one go, and add the extra constraints needed. Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.c | 45 ++++++++++++++++++++++++++++--- drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h | 7 ++--- drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 25 +++++++++-------- 3 files changed, 57 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.c index 1ca9ecc46d91..ff52c49095f9 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.c @@ -19,13 +19,14 @@ int mdp5_pipe_assign(struct drm_atomic_state *s, struct drm_plane *plane, uint32_t caps, uint32_t blkcfg, - struct mdp5_hw_pipe **hwpipe) + struct mdp5_hw_pipe **hwpipe, + struct mdp5_hw_pipe **r_hwpipe) { struct msm_drm_private *priv = s->dev->dev_private; struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(priv->kms)); struct mdp5_state *state; struct mdp5_hw_pipe_state *old_state, *new_state; - int i; + int i, j; state = mdp5_get_state(s); if (IS_ERR(state)) @@ -65,16 +66,46 @@ int mdp5_pipe_assign(struct drm_atomic_state *s, struct drm_plane *plane, * fewest unneeded caps bits set: */ if (!(*hwpipe) || (hweight_long(cur->caps & ~caps) < - hweight_long((*hwpipe)->caps & ~caps))) - *hwpipe = cur; + hweight_long((*hwpipe)->caps & ~caps))) { + bool r_found = false; + + if (r_hwpipe) { + for (j = i + 1; j < mdp5_kms->num_hwpipes; + j++) { + struct mdp5_hw_pipe *r_cur = + mdp5_kms->hwpipes[j]; + + /* reject different types of hwpipes */ + if (r_cur->caps != cur->caps) + continue; + + /* respect priority, eg. VIG0 > VIG1 */ + if (cur->pipe > r_cur->pipe) + continue; + + *r_hwpipe = r_cur; + r_found = true; + break; + } + } + + if (!r_hwpipe || r_found) + *hwpipe = cur; + } } if (!(*hwpipe)) return -ENOMEM; + if (r_hwpipe && !(*r_hwpipe)) + return -ENOMEM; + if (mdp5_kms->smp) { int ret; + /* We don't support SMP and 2 hwpipes/plane together */ + WARN_ON(r_hwpipe); + DBG("%s: alloc SMP blocks", (*hwpipe)->name); ret = mdp5_smp_assign(mdp5_kms->smp, &state->smp, (*hwpipe)->pipe, blkcfg); @@ -88,6 +119,12 @@ int mdp5_pipe_assign(struct drm_atomic_state *s, struct drm_plane *plane, (*hwpipe)->name, plane->name, caps); new_state->hwpipe_to_plane[(*hwpipe)->idx] = plane; + if (r_hwpipe) { + DBG("%s: assign to right of plane %s for caps %x", + (*r_hwpipe)->name, plane->name, caps); + new_state->hwpipe_to_plane[(*r_hwpipe)->idx] = plane; + } + return 0; } diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h index aaa2bd4e9c32..bb2b0ac7aa2b 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_pipe.h @@ -44,9 +44,10 @@ struct mdp5_hw_pipe_state { struct drm_plane *hwpipe_to_plane[SSPP_MAX]; }; -int -mdp5_pipe_assign(struct drm_atomic_state *s, struct drm_plane *plane, - uint32_t caps, uint32_t blkcfg, struct mdp5_hw_pipe **hwpipe); +int mdp5_pipe_assign(struct drm_atomic_state *s, struct drm_plane *plane, + uint32_t caps, uint32_t blkcfg, + struct mdp5_hw_pipe **hwpipe, + struct mdp5_hw_pipe **r_hwpipe); void mdp5_pipe_release(struct drm_atomic_state *s, struct mdp5_hw_pipe *hwpipe); struct mdp5_hw_pipe *mdp5_pipe_init(enum mdp5_pipe pipe, diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c index aec115e20053..f1cf367e853d 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c @@ -393,31 +393,30 @@ static int mdp5_plane_atomic_check_with_state(struct drm_crtc_state *crtc_state, struct mdp5_hw_pipe *old_hwpipe = mdp5_state->hwpipe; struct mdp5_hw_pipe *old_right_hwpipe = mdp5_state->r_hwpipe; + struct mdp5_hw_pipe *new_hwpipe = NULL; + struct mdp5_hw_pipe *new_right_hwpipe = NULL; ret = mdp5_pipe_assign(state->state, plane, caps, - blkcfg, &mdp5_state->hwpipe); + blkcfg, &new_hwpipe, + need_right_hwpipe ? + &new_right_hwpipe : NULL); if (ret) { - DBG("%s: failed to assign hwpipe!", plane->name); + DBG("%s: failed to assign hwpipe(s)!", + plane->name); return ret; } - if (need_right_hwpipe) { - ret = mdp5_pipe_assign(state->state, plane, - caps, blkcfg, - &mdp5_state->r_hwpipe); - if (ret) { - DBG("%s: failed to assign right hwpipe", - plane->name); - return ret; - } - } else { + mdp5_state->hwpipe = new_hwpipe; + if (need_right_hwpipe) + mdp5_state->r_hwpipe = new_right_hwpipe; + else /* * set it to NULL so that the driver knows we * don't have a right hwpipe when committing a * new state */ mdp5_state->r_hwpipe = NULL; - } + mdp5_pipe_release(state->state, old_hwpipe); mdp5_pipe_release(state->state, old_right_hwpipe);