From patchwork Thu Dec 7 15:19:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Riegel X-Patchwork-Id: 10099429 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E4B5F602BF for ; Thu, 7 Dec 2017 15:22:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C6EFE2097A for ; Thu, 7 Dec 2017 15:22:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C565B26247; Thu, 7 Dec 2017 15:22:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D6CAF2097A for ; Thu, 7 Dec 2017 15:22:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754741AbdLGPVK (ORCPT ); Thu, 7 Dec 2017 10:21:10 -0500 Received: from mail.savoirfairelinux.com ([208.88.110.44]:54946 "EHLO mail.savoirfairelinux.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754406AbdLGPTz (ORCPT ); Thu, 7 Dec 2017 10:19:55 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.savoirfairelinux.com (Postfix) with ESMTP id F02A79C304E; Thu, 7 Dec 2017 10:19:54 -0500 (EST) Received: from mail.savoirfairelinux.com ([127.0.0.1]) by localhost (mail.savoirfairelinux.com [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id 2Jk6-YuS3sdj; Thu, 7 Dec 2017 10:19:54 -0500 (EST) Received: from localhost (localhost [127.0.0.1]) by mail.savoirfairelinux.com (Postfix) with ESMTP id 420049C3042; Thu, 7 Dec 2017 10:19:54 -0500 (EST) X-Virus-Scanned: amavisd-new at mail.savoirfairelinux.com Received: from mail.savoirfairelinux.com ([127.0.0.1]) by localhost (mail.savoirfairelinux.com [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id JN4uF4s1IDHy; Thu, 7 Dec 2017 10:19:54 -0500 (EST) Received: from workotop.localdomain (modemcable073.90-22-96.mc.videotron.ca [96.22.90.73]) by mail.savoirfairelinux.com (Postfix) with ESMTPSA id D967A9C304D; Thu, 7 Dec 2017 10:19:53 -0500 (EST) From: Damien Riegel To: linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Bjorn Andersson , Andy Gross , David Brown , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , kernel@savoirfairelinux.com, Damien Riegel Subject: [PATCH v2 09/10] arm64: dts: qcom: msm8916: normalize I2C and SPI nodes Date: Thu, 7 Dec 2017 10:19:41 -0500 Message-Id: <20171207151942.5805-10-damien.riegel@savoirfairelinux.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171207151942.5805-1-damien.riegel@savoirfairelinux.com> References: <20171207151942.5805-1-damien.riegel@savoirfairelinux.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The QUP core can be used either for I2C or SPI, so the same IP is mapped by a driver or the other. SPI bindings use a leading 0 for the start address and a size of 0x600, I2C bindings don't have the leading 0 and have a size 0x1000. To make them more similar, add the leading 0 to I2C bindings and changes the size to 0x500 for all of them, as this is the actual size of these blocks. Also align the second entry of the clocks array. Signed-off-by: Damien Riegel Acked-by: Bjorn Andersson --- Changes in v2: - Set size to 0x500 arch/arm64/boot/dts/qcom/msm8916.dtsi | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index e16ba8334518..ac440f287633 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -355,7 +355,7 @@ blsp_spi1: spi@78b5000 { compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b5000 0x600>; + reg = <0x078b5000 0x500>; interrupts = ; clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; @@ -372,7 +372,7 @@ blsp_spi2: spi@78b6000 { compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b6000 0x600>; + reg = <0x078b6000 0x500>; interrupts = ; clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; @@ -389,7 +389,7 @@ blsp_spi3: spi@78b7000 { compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b7000 0x600>; + reg = <0x078b7000 0x500>; interrupts = ; clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; @@ -406,7 +406,7 @@ blsp_spi4: spi@78b8000 { compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b8000 0x600>; + reg = <0x078b8000 0x500>; interrupts = ; clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; @@ -423,7 +423,7 @@ blsp_spi5: spi@78b9000 { compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078b9000 0x600>; + reg = <0x078b9000 0x500>; interrupts = ; clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; @@ -440,7 +440,7 @@ blsp_spi6: spi@78ba000 { compatible = "qcom,spi-qup-v2.2.1"; - reg = <0x078ba000 0x600>; + reg = <0x078ba000 0x500>; interrupts = ; clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; @@ -457,10 +457,10 @@ blsp_i2c2: i2c@78b6000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x78b6000 0x1000>; + reg = <0x078b6000 0x500>; interrupts = ; clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; + <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; clock-names = "iface", "core"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c2_default>; @@ -472,10 +472,10 @@ blsp_i2c4: i2c@78b8000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x78b8000 0x1000>; + reg = <0x078b8000 0x500>; interrupts = ; clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>; + <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>; clock-names = "iface", "core"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c4_default>; @@ -487,10 +487,10 @@ blsp_i2c6: i2c@78ba000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x78ba000 0x1000>; + reg = <0x078ba000 0x500>; interrupts = ; clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>; + <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>; clock-names = "iface", "core"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c6_default>;