From patchwork Wed Jan 31 16:19:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 10194205 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 30F6F601A0 for ; Wed, 31 Jan 2018 16:22:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 13CBF28739 for ; Wed, 31 Jan 2018 16:22:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0833B28742; Wed, 31 Jan 2018 16:22:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A50EF28739 for ; Wed, 31 Jan 2018 16:22:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753969AbeAaQWH (ORCPT ); Wed, 31 Jan 2018 11:22:07 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:34140 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932283AbeAaQVs (ORCPT ); Wed, 31 Jan 2018 11:21:48 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 41DB3607DC; Wed, 31 Jan 2018 16:21:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1517415708; bh=CVq0DMZ7RZ0xLuKHUFskXvRP2wxLfGs6Ay018LMiyDc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WtvQ5rDa4GTtShcS1EowOny+MDMGCmcNRiwhq4H82d7wsFUh1sgw8CltWpq2OM2mz lkHxy+x/QfmqVl55M/kUyt6LFiYBkfsi4wzj/xLgC2tAsdPYvJpAatmEPOpsmx5tKO AZeAh3j71Y5Zra4FVqzWZgZMEFGPaL7xyvw+l+EE= Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.1 with cipher ECDHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id E191B607DC; Wed, 31 Jan 2018 16:21:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1517415707; bh=CVq0DMZ7RZ0xLuKHUFskXvRP2wxLfGs6Ay018LMiyDc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=imnqmpNY6dl1aRimwk96SqWdV5FiNdyHu5muqk+Xzt1DuSwr2owv+yNXmB3YTY5Wp /IJ4ipgAEEWH8/4fkA1zeaMB+ZeYqCdK3jqH6wDk6onqm7jf0m2kryAt3OAow1dYEr b/c046POlP0XKTNDhJJJ3IZc6cyxJmZW2YR5HDTU= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E191B607DC Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: andy.gross@linaro.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, sboyd@codeaurora.org, evgreen@chromium.org, Rajendra Nayak Subject: [PATCH v2 3/3] arm64: dts: sdm845: Add serial console support Date: Wed, 31 Jan 2018 21:49:41 +0530 Message-Id: <20180131161941.29865-4-rnayak@codeaurora.org> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180131161941.29865-1-rnayak@codeaurora.org> References: <20180131161941.29865-1-rnayak@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the qup uart node and geni se instance needed to support the serial console on the MTP. Signed-off-by: Rajendra Nayak --- arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 42 +++++++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 21 +++++++++++++++++ 2 files changed, 63 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts index 617c7bb25fb1..42fbf2ab9a2d 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts @@ -10,4 +10,46 @@ / { model = "Qualcomm Technologies, Inc. SDM845 MTP"; compatible = "qcom,sdm845-mtp"; + + aliases { + serial0 = &qup_uart2; + }; + + chosen { + stdout-path = "serial0"; + }; + + soc { + serial@a84000 { + status = "okay"; + }; + + pinctrl@3400000 { + qup_uart2_default: qup_uart2_default { + pinmux { + function = "qup9"; + pins = "gpio4", "gpio5"; + }; + + pinconf { + pins = "gpio4", "gpio5"; + drive-strength = <2>; + bias-disable; + }; + }; + + qup_uart2_sleep: qup_uart2_sleep { + pinmux { + function = "gpio"; + pins = "gpio4", "gpio5"; + }; + + pinconf { + pins = "gpio4", "gpio5"; + drive-strength = <2>; + bias-disable; + }; + }; + }; + }; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 02520f19e4ca..c4ce70840acf 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -4,6 +4,7 @@ */ #include +#include / { model = "Qualcomm Technologies, Inc. SDM845"; @@ -273,5 +274,25 @@ cell-index = <0>; }; + qup_1: qcom,geni_se@ac0000 { + compatible = "qcom,geni-se-qup"; + reg = <0xac0000 0x6000>; + }; + + qup_uart2: serial@a84000 { + compatible = "qcom,geni-console", "qcom,geni-uart"; + reg = <0xa84000 0x4000>; + reg-names = "se_phys"; + clock-names = "se-clk", "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>, + <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&qup_uart2_default>; + pinctrl-1 = <&qup_uart2_sleep>; + interrupts = ; + qcom,wrapper-core = <&qup_1>; + status = "disabled"; + }; }; };