From patchwork Tue Mar 20 03:23:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Escande X-Patchwork-Id: 10296225 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CB020600F6 for ; Tue, 20 Mar 2018 03:24:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BBCBA1FF3E for ; Tue, 20 Mar 2018 03:24:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B057E294F7; Tue, 20 Mar 2018 03:24:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 46A2F1FF3E for ; Tue, 20 Mar 2018 03:24:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751840AbeCTDYK (ORCPT ); Mon, 19 Mar 2018 23:24:10 -0400 Received: from mail-pl0-f66.google.com ([209.85.160.66]:36993 "EHLO mail-pl0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751610AbeCTDYC (ORCPT ); Mon, 19 Mar 2018 23:24:02 -0400 Received: by mail-pl0-f66.google.com with SMTP id w12-v6so180697plp.4 for ; Mon, 19 Mar 2018 20:24:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfert-encoding; bh=0NctSLm3CC7xB0HsHT7mIZUNySDi3TmOd5s8pz5e+So=; b=jkA3g98hX5vdT7iqN34UsvjqCzFdllpEsC6kogcgb/zizA7fZ8xFiT422yztdwjbFv HCn7UhSDsRijCi5B1TuCKuOe47nUO0rRfWNUMxO411bjkgNszD6WzhqVapTCoa4WGfaT 6bQzh+3iyc47CB6bx43JXuVHJ6wW/svjQ/xZM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfert-encoding; bh=0NctSLm3CC7xB0HsHT7mIZUNySDi3TmOd5s8pz5e+So=; b=XTUMFoyH7RJ4QPRXXbXpONzpGCOsQyUBXNQKqv5dP8qagyTMAoWDsAj4bdJJ0unWTd P+P5saZ3q3ON5ctJx7aqeGWjl3DOEgLmTH0YzqmPrZVb03DctiC4Pydwrjs9Lc3pv3/i 6ulDT2ePUe3rKIILPOszV+SxbzG7T4vVWf7X7kg6F9YZN9uVsYC3OcdAvH7ogBT116QH wUqcSn3ZKMJJk7UYCV93AbLROp5k40QzCsou7OnACFAOMme9tlksYkbC/Ny0rFnYYczm APRLbTBI14mjBnwMnVBAWaiylGDe9mLeJV1TC4hlsBZMs7PF+C9StDHreydajI6mNPFw s+WQ== X-Gm-Message-State: AElRT7FkT3kkvGH0lljQrMdXgLU/rHV71XNRJiC5iVQ0IKCJURBQJdVP pcePgfATfzOncfrM/uXrmOgvJA== X-Google-Smtp-Source: AG47ELs9lrFcnCR84oGVKqLQg9gFZy6SCOW69mqgSw63IIDHV2qab23Hv80i8D2c0EFX3YEAuSFVRg== X-Received: by 2002:a17:902:6ec5:: with SMTP id l5-v6mr14795300pln.113.1521516241700; Mon, 19 Mar 2018 20:24:01 -0700 (PDT) Received: from localhost.localdomain ([218.255.99.6]) by smtp.gmail.com with ESMTPSA id c14sm741286pfn.185.2018.03.19.20.23.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 19 Mar 2018 20:24:01 -0700 (PDT) From: Thierry Escande To: Rob Herring , Andy Gross , Marcel Holtmann , Johan Hedberg , David Brown , Mark Rutland Cc: Andy Shevchenko , Loic Poulain , Bjorn Andersson , Srinivas Kandagatla , linux-bluetooth@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 1/3] arm64: dts: apq8096-db820c: enable bluetooth node Date: Tue, 20 Mar 2018 04:23:29 +0100 Message-Id: <20180320032331.29865-2-thierry.escande@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180320032331.29865-1-thierry.escande@linaro.org> References: <20180320032331.29865-1-thierry.escande@linaro.org> MIME-Version: 1.0 Content-Transfert-Encoding: 8bit Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a new serial node for the Qualcomm BT controller QCA6174. This allows automatic probing and hci registration through the serdev framework instead of relying on the userspace helpers. Signed-off-by: Thierry Escande --- v5: - Rename 'bt-disable-n' gpio as 'enable' v4: no change v3: no change v2: - Fix author email arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi | 14 +++++++++ .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi | 17 +++++++++++ arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 33 ++++++++++++++++++++++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +++++++ 4 files changed, 74 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi index 24552f19b3fa..172165d84669 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pins.dtsi @@ -36,4 +36,18 @@ drive-strength = <2>; /* 2 MA */ }; }; + + blsp1_uart1_default: blsp1_uart1_default { + function = "blsp_uart2"; + pins = "gpio41", "gpio42", "gpio43", "gpio44"; + drive-strength = <16>; + bias-disable; + }; + + blsp1_uart1_sleep: blsp1_uart1_sleep { + function = "gpio"; + pins = "gpio41", "gpio42", "gpio43", "gpio44"; + drive-strength = <2>; + bias-disable; + }; }; diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi index 59b29ddfb6e9..f8d2a3b10b1f 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi @@ -26,6 +26,23 @@ }; }; + divclk4_pin_a: divclk4 { + pins = "gpio18"; + function = "func2"; + + bias-disable; + power-source = ; + }; + + bt_en_pin_a: bt-en-active { + pins = "gpio19"; + function = "normal"; + + output-low; + power-source = ; + qcom,drive-strength = ; + }; + usb3_vbus_det_gpio: pm8996_gpio22 { pinconf { pins = "gpio22"; diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi index 1c8f1b86472d..8b3bcdf0d718 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi @@ -23,6 +23,7 @@ aliases { serial0 = &blsp2_uart1; serial1 = &blsp2_uart2; + serial2 = &blsp1_uart1; i2c0 = &blsp1_i2c2; i2c1 = &blsp2_i2c1; i2c2 = &blsp2_i2c0; @@ -34,7 +35,39 @@ stdout-path = "serial0:115200n8"; }; + clocks { + divclk4: divclk4 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "divclk4"; + + pinctrl-names = "default"; + pinctrl-0 = <&divclk4_pin_a>; + }; + }; + soc { + serial@7570000 { + label = "BT-UART"; + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp1_uart1_default>; + pinctrl-1 = <&blsp1_uart1_sleep>; + + bluetooth { + compatible = "qcom,qca6174-bt"; + + /* bt_disable_n gpio */ + enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&bt_en_pin_a>; + + clocks = <&divclk4>; + }; + }; + serial@75b0000 { label = "LS-UART1"; status = "okay"; diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 0a6f7952bbb1..2d54a86a027f 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -408,6 +408,16 @@ #clock-cells = <1>; }; + blsp1_uart1: serial@7570000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x07570000 0x1000>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + blsp1_spi0: spi@7575000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0x07575000 0x600>;