From patchwork Fri May 18 21:34:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10412273 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A21EE602CB for ; Fri, 18 May 2018 21:35:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 93CCF28980 for ; Fri, 18 May 2018 21:35:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 853A328AF7; Fri, 18 May 2018 21:35:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EE69A28AF1 for ; Fri, 18 May 2018 21:35:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752174AbeERVfZ (ORCPT ); Fri, 18 May 2018 17:35:25 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:37692 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752193AbeERVfY (ORCPT ); Fri, 18 May 2018 17:35:24 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A0FC260FED; Fri, 18 May 2018 21:35:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526679323; bh=QrE62OHzDC6hl/gi/dAey/tFN5iAbjm6YBA2gJs/nks=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=X5K9NNpmw4a3nPwH2AEp04/h1QkBAFiSvMxqrlDyQrv22g01jTzV2st+hF2kD3RMo QQbPaTSpxiRSSf1UPCLa2sAOD/kYiPKRzTRi/tBG8ftkGmfr0B1F6BxLUtv76svIfy nsQxWlqXtA6LWsWNZozjCXNSTxQJkOhb8anu9/rY= Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id B77BF60C54; Fri, 18 May 2018 21:35:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1526679313; bh=QrE62OHzDC6hl/gi/dAey/tFN5iAbjm6YBA2gJs/nks=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VfniHmJAn1+5V/xdwbpOFFuEcXlZySrgLp2uLRG36MLE1Q5+besxjoCPQLmXXvD2v VLi4piFRmfwpCh7vWLwkkHJiflywd6kcYARshCGsB3cMoAr1uTK6yB33bCSqBg6GdK dZBbxa4x4SEr650HKlJMxegsccolu6FWEVoueN/Q= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org B77BF60C54 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, jean-philippe.brucker@arm.com, tfiga@chromium.org, iommu@lists.linux-foundation.org, vivek.gautam@codeaurora.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org Subject: [PATCH 09/16] drm/msm/gpu: Support using split page tables for kernel buffer objects Date: Fri, 18 May 2018 15:34:53 -0600 Message-Id: <20180518213500.31595-10-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180518213500.31595-1-jcrouse@codeaurora.org> References: <20180518213500.31595-1-jcrouse@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP arm-smmu based targets can support split pagetables (TTBR0/TTBR1). This is most useful for implementing per-instance pagetables so that the "user" pagetable can be swapped out while the "kernel" or "global" pagetable remains entact. if the target specifies a global virtual memory range then try to enable TTBR1 (the "global" pagetable) on the domain and if successful use the global virtual memory range for allocations on the default GPU address space - this ensures that the global allocations make it into the right space. Per-instance pagetables still need additional support to be enabled but even if they aren't set up it isn't harmful to just use TTBR1 for all virtual memory regions and leave the other pagetable unused. If TTBR1 support isn't enabled then fall back to the "legacy" virtual address space both kernel and user. Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/msm_gpu.c | 19 +++++++++++++++++-- drivers/gpu/drm/msm/msm_gpu.h | 4 ++-- 2 files changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 2f45bea04221..78e8e56d2499 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -703,7 +703,8 @@ static int get_clocks(struct platform_device *pdev, struct msm_gpu *gpu) static struct msm_gem_address_space * msm_gpu_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev, - uint64_t va_start, uint64_t va_end) + u64 va_start, u64 va_end, + u64 va_global_start, u64 va_global_end) { struct iommu_domain *iommu; struct msm_gem_address_space *aspace; @@ -721,6 +722,19 @@ msm_gpu_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev, iommu->geometry.aperture_start = va_start; iommu->geometry.aperture_end = va_end; + /* If a va_global range was specified then try to set up split tables */ + if (va_global_start && va_global_end) { + int val = 1; + + ret = iommu_domain_set_attr(iommu, DOMAIN_ATTR_SPLIT_TABLES, + &val); + + if (!WARN(ret, "Unable to enable split pagetables for the IOMMU\n")) { + iommu->geometry.aperture_start = va_global_start; + iommu->geometry.aperture_end = va_global_end; + } + } + dev_info(gpu->dev->dev, "%s: using IOMMU\n", gpu->name); aspace = msm_gem_address_space_create(&pdev->dev, iommu, "gpu"); @@ -813,7 +827,8 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, msm_devfreq_init(gpu); gpu->aspace = msm_gpu_create_address_space(gpu, pdev, - config->va_start, config->va_end); + config->va_start, config->va_end, config->va_start_global, + config->va_end_global); if (gpu->aspace == NULL) dev_info(drm->dev, "%s: no IOMMU, fallback to VRAM carveout!\n", name); diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index b8241179175a..da58aa6c12c8 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -31,8 +31,8 @@ struct msm_gpu_perfcntr; struct msm_gpu_config { const char *ioname; const char *irqname; - uint64_t va_start; - uint64_t va_end; + uint64_t va_start, va_end; + uint64_t va_start_global, va_end_global; unsigned int nr_rings; };