From patchwork Wed Jun 20 20:48:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 10478715 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EA17660383 for ; Wed, 20 Jun 2018 20:49:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D9E5C283A5 for ; Wed, 20 Jun 2018 20:49:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CEB4D283AF; Wed, 20 Jun 2018 20:49:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 27DD0283A5 for ; Wed, 20 Jun 2018 20:49:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933368AbeFTUs7 (ORCPT ); Wed, 20 Jun 2018 16:48:59 -0400 Received: from mail-yb0-f172.google.com ([209.85.213.172]:40852 "EHLO mail-yb0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933329AbeFTUs5 (ORCPT ); Wed, 20 Jun 2018 16:48:57 -0400 Received: by mail-yb0-f172.google.com with SMTP id v17-v6so361341ybe.7 for ; Wed, 20 Jun 2018 13:48:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FzASEka2zpHtAGTqGKWgX1NKaudrafdv4lPvpMLV3hA=; b=HnHZKdC3/nJRmXApJiKCLTLBj2SfqUDEhWXqdVlDYHB3Z0MsbTTjh5pVYDT6oHn0RM OEErbDoeA+WGYqazMdSTffYOTuECVU5uRna5cieAInMRb7+yeXzyzydLHgAQk5KhIqUn 3abBW0czhOcTYos5BPaMCtzCFSRRjSgSDwVVg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FzASEka2zpHtAGTqGKWgX1NKaudrafdv4lPvpMLV3hA=; b=ctNr4IU09DzVnDp42A6hBR087qZ54wtLRlUuupvTlc3S2PzadYmdQ+bPDxAM7s7oHe nJkLqVP1rrSxNEuEBxWmmYbNdwqwDOYcqE7s/dzAVnZnCbnL00g1SLVtVlLYmTgk17+r GeGTWDQ95uEP7bAplUvLGiWgJWKl3Fl+WGnSf70IHqtfHotBy71nK7WZTAtvCOYmKV+Y blwA1eiPzM6YSaEGd1LYVzwsPND+h4Kj7SS2yHUQhvb62WeG1R5e9NUuJHIquCmKgrHW a0M1nD3mBg9aQYhF/yBrL02nHaP4xlPDzPfpBt9t5/EJ/zOXVcfWTo5PK3Thh3mDpcvP X9Ag== X-Gm-Message-State: APt69E0BABX/i76TLyu8SMXAm2h1/PXQoEQTbVYshxETmYqRVWtqi/Wp Gxei0hJMCiNVqA5GL5cZHZumzusT5qI= X-Google-Smtp-Source: ADUXVKJaeZuaw176X2iNWXYIdrEP1OVXyk2vyXRWJJ//fQMrgPIT8wix2LfzntvV8oB/ypzSF2MbIA== X-Received: by 2002:a25:9945:: with SMTP id n5-v6mr11293310ybo.137.1529527736691; Wed, 20 Jun 2018 13:48:56 -0700 (PDT) Received: from rosewood.cam.corp.google.com ([2620:0:1013:11:ad55:b1db:adfe:3b9f]) by smtp.gmail.com with ESMTPSA id p3-v6sm1173865ywh.36.2018.06.20.13.48.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 20 Jun 2018 13:48:56 -0700 (PDT) From: Sean Paul To: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Cc: robdclark@gmail.com, hoegsberg@chromium.org, jsanka@codeaurora.org, abhinavk@codeaurora.org, Sean Paul Subject: [DPU PATCH 16/19] drm/msm: dpu: Remove panic from dpu debug dump Date: Wed, 20 Jun 2018 16:48:38 -0400 Message-Id: <20180620204841.56354-17-seanpaul@chromium.org> X-Mailer: git-send-email 2.18.0.rc1.244.gcf134e6275-goog In-Reply-To: <20180620204841.56354-1-seanpaul@chromium.org> References: <20180620204841.56354-1-seanpaul@chromium.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Better not to allow arbitrary panics of the kernel when poking debugfs files. Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +- .../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 2 +- .../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 2 +- drivers/gpu/drm/msm/dpu_dbg.c | 31 +++---------------- drivers/gpu/drm/msm/dpu_dbg.h | 4 --- 5 files changed, 8 insertions(+), 33 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 5ff627827be9..3519f7e84f0f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1563,7 +1563,7 @@ void dpu_encoder_helper_hw_reset(struct dpu_encoder_phys *phys_enc) rc = ctl->ops.reset(ctl); if (rc) { DPU_ERROR_ENC(dpu_enc, "ctl %d reset failure\n", ctl->idx); - DPU_DBG_DUMP("dbg_bus", "vbif_dbg_bus", "panic"); + DPU_DBG_DUMP("dbg_bus", "vbif_dbg_bus"); } phys_enc->enable_state = DPU_ENC_ENABLED; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index 5589d1289da9..19f5b5064ed8 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -262,7 +262,7 @@ static int _dpu_encoder_phys_cmd_handle_ppdone_timeout( atomic_read(&phys_enc->pending_kickoff_cnt)); dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_RDPTR); - DPU_DBG_DUMP("dbg_bus", "vbif_dbg_bus", "panic"); + DPU_DBG_DUMP("dbg_bus", "vbif_dbg_bus"); } atomic_add_unless(&phys_enc->pending_kickoff_cnt, -1, 0); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index 8ac7f0537c05..54f4e78cf1fd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -638,7 +638,7 @@ static void dpu_encoder_phys_vid_prepare_for_kickoff( DPU_ERROR_VIDENC(vid_enc, "ctl %d reset failure: %d\n", ctl->idx, rc); dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_VSYNC); - DPU_DBG_DUMP("dbg_bus", "vbif_dbg_bus", "panic"); + DPU_DBG_DUMP("dbg_bus", "vbif_dbg_bus"); } } diff --git a/drivers/gpu/drm/msm/dpu_dbg.c b/drivers/gpu/drm/msm/dpu_dbg.c index 3572e3cbec6c..2a9b8c732e33 100644 --- a/drivers/gpu/drm/msm/dpu_dbg.c +++ b/drivers/gpu/drm/msm/dpu_dbg.c @@ -26,7 +26,6 @@ #include "disp/dpu1/dpu_hw_catalog.h" -#define DEFAULT_PANIC 1 #define DEFAULT_DBGBUS_DPU DPU_DBG_DUMP_IN_MEM #define DEFAULT_DBGBUS_VBIFRT DPU_DBG_DUMP_IN_MEM #define REG_BASE_NAME_LEN 80 @@ -128,9 +127,7 @@ struct dpu_dbg_vbif_debug_bus { * struct dpu_dbg_base - global dpu debug base structure * @reg_base_list: list of register dumping regions * @dev: device pointer - * @panic_on_err: whether to kernel panic after triggering dump via debugfs * @dump_work: work struct for deferring register dump work to separate thread - * @work_panic: panic after dump if internal user passed "panic" special region * @dbgbus_dpu: debug bus structure for the dpu * @dbgbus_vbif_rt: debug bus structure for the realtime vbif * @dsi_dbg_bus: dump dsi debug bus register @@ -139,9 +136,7 @@ static struct dpu_dbg_base { struct list_head reg_base_list; struct device *dev; - u32 panic_on_err; struct work_struct dump_work; - bool work_panic; struct dpu_dbg_dpu_debug_bus dbgbus_dpu; struct dpu_dbg_vbif_debug_bus dbgbus_vbif_rt; @@ -2230,22 +2225,18 @@ static void _dpu_dbg_dump_vbif_dbg_bus(struct dpu_dbg_vbif_debug_bus *bus) /** * _dpu_dump_array - dump array of register bases - * @do_panic: whether to trigger a panic after dumping * @name: string indicating origin of dump * @dump_dbgbus_dpu: whether to dump the dpu debug bus * @dump_dbgbus_vbif_rt: whether to dump the vbif rt debug bus */ -static void _dpu_dump_array(bool do_panic, const char *name, - bool dump_dbgbus_dpu, bool dump_dbgbus_vbif_rt) +static void _dpu_dump_array(const char *name, bool dump_dbgbus_dpu, + bool dump_dbgbus_vbif_rt) { if (dump_dbgbus_dpu) _dpu_dbg_dump_dpu_dbg_bus(&dpu_dbg_base.dbgbus_dpu); if (dump_dbgbus_vbif_rt) _dpu_dbg_dump_vbif_dbg_bus(&dpu_dbg_base.dbgbus_vbif_rt); - - if (do_panic && dpu_dbg_base.panic_on_err) - panic(name); } /** @@ -2254,14 +2245,13 @@ static void _dpu_dump_array(bool do_panic, const char *name, */ static void _dpu_dump_work(struct work_struct *work) { - _dpu_dump_array(dpu_dbg_base.work_panic, "dpudump_workitem", + _dpu_dump_array("dpudump_workitem", dpu_dbg_base.dbgbus_dpu.cmn.include_in_deferred_work, dpu_dbg_base.dbgbus_vbif_rt.cmn.include_in_deferred_work); } void dpu_dbg_dump(bool queue_work, const char *name, ...) { - bool do_panic = false; bool dump_dbgbus_dpu = false; bool dump_dbgbus_vbif_rt = false; va_list args; @@ -2283,23 +2273,18 @@ void dpu_dbg_dump(bool queue_work, const char *name, ...) if (!strcmp(blk_name, "dsi_dbg_bus")) dpu_dbg_base.dsi_dbg_bus = true; - - if (!strcmp(blk_name, "panic")) - do_panic = true; } va_end(args); if (queue_work) { /* schedule work to dump later */ - dpu_dbg_base.work_panic = do_panic; dpu_dbg_base.dbgbus_dpu.cmn.include_in_deferred_work = dump_dbgbus_dpu; dpu_dbg_base.dbgbus_vbif_rt.cmn.include_in_deferred_work = dump_dbgbus_vbif_rt; schedule_work(&dpu_dbg_base.dump_work); } else { - _dpu_dump_array(do_panic, name, dump_dbgbus_dpu, - dump_dbgbus_vbif_rt); + _dpu_dump_array(name, dump_dbgbus_dpu, dump_dbgbus_vbif_rt); } } @@ -2326,7 +2311,7 @@ static int dpu_dbg_debugfs_open(struct inode *inode, struct file *file) static ssize_t dpu_dbg_dump_write(struct file *file, const char __user *user_buf, size_t count, loff_t *ppos) { - _dpu_dump_array(dpu_dbg_base.panic_on_err, "dump_debugfs", true, true); + _dpu_dump_array("dump_debugfs", true, true); return count; } @@ -2345,8 +2330,6 @@ int dpu_dbg_debugfs_register(struct dentry *debugfs_root) debugfs_create_file("dump", 0600, debugfs_root, NULL, &dpu_dbg_dump_fops); - debugfs_create_u32("panic", 0600, debugfs_root, - &dpu_dbg_base.panic_on_err); if (dbg->dbgbus_dpu.entries) { dbg->dbgbus_dpu.cmn.name = DBGBUS_NAME_DPU; @@ -2414,10 +2397,6 @@ int dpu_dbg_init(struct device *dev) dpu_dbg_base.dev = dev; INIT_WORK(&dpu_dbg_base.dump_work, _dpu_dump_work); - dpu_dbg_base.work_panic = false; - dpu_dbg_base.panic_on_err = DEFAULT_PANIC; - - pr_info("debug_status: panic:%d\n", dpu_dbg_base.panic_on_err); return 0; } diff --git a/drivers/gpu/drm/msm/dpu_dbg.h b/drivers/gpu/drm/msm/dpu_dbg.h index dd36c30cf7c0..6a247ce39997 100644 --- a/drivers/gpu/drm/msm/dpu_dbg.h +++ b/drivers/gpu/drm/msm/dpu_dbg.h @@ -27,8 +27,6 @@ enum dpu_dbg_dump_flag { * @va_args: list of named register dump ranges and regions to dump, as * registered previously through dpu_dbg_reg_register_base and * dpu_dbg_reg_register_dump_range. - * Including the special name "panic" will trigger a panic after - * the dumping work has completed. */ #define DPU_DBG_DUMP(...) dpu_dbg_dump(false, __func__, ##__VA_ARGS__, NULL) @@ -67,8 +65,6 @@ void dpu_dbg_destroy(void); * @va_args: list of named register dump ranges and regions to dump, as * registered previously through dpu_dbg_reg_register_base and * dpu_dbg_reg_register_dump_range. - * Including the special name "panic" will trigger a panic after - * the dumping work has completed. * Returns: none */ void dpu_dbg_dump(bool queue_work, const char *name, ...);