From patchwork Fri Jun 29 16:56:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10497067 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C3F076016C for ; Fri, 29 Jun 2018 16:57:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AC99A2971B for ; Fri, 29 Jun 2018 16:57:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A172229724; Fri, 29 Jun 2018 16:57:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 078082971B for ; Fri, 29 Jun 2018 16:57:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S937111AbeF2Q5C (ORCPT ); Fri, 29 Jun 2018 12:57:02 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:44636 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S937108AbeF2Q5B (ORCPT ); Fri, 29 Jun 2018 12:57:01 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id DE02460B22; Fri, 29 Jun 2018 16:56:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1530291421; bh=ayuW8KIiOfzq2aWHoeI61Ql/m5RAgX7+cd59w5o4/EM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OaQEqxU2Z7jhQPluFHrTi9p553SEhzg53t66GIwpDMSmFr2BZWQ08CTvJz6bbg545 WzTZETAwqkeyBgkSChX62kRq6Qg7+db484dwRZH+uyxb1J57FprHiwWczR1hHki+St LXfejfwr0hLfF4ibfEcM7ORNq+tsN8shrFcgpn40= Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id AB93460B26; Fri, 29 Jun 2018 16:56:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1530291413; bh=ayuW8KIiOfzq2aWHoeI61Ql/m5RAgX7+cd59w5o4/EM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Y9OQ8JoxKcpdR0UlQFgeQJ2gehoPsEa1ors29FITxu1TxIywwNflx1YKzmR0wjdLz ZSeb9lhVErXi9q3jF24Uoy2vmdvABEFtg4ra9tSGq3c23aoK5caMWxbtTLUjrOu8S2 mVEoV0s8pRwyTDIGAwL8gTynvxybCKSKnh/JOvwg= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org AB93460B26 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Subject: [PATCH 13/13] drm/msm/gpu: Add the buffer objects from the submit to the crash dump Date: Fri, 29 Jun 2018 10:56:41 -0600 Message-Id: <20180629165641.1348-14-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180629165641.1348-1-jcrouse@codeaurora.org> References: <20180629165641.1348-1-jcrouse@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP For hangs, dump copy out the contents of the buffer objects attached to the guilty submission and print them in the crash dump report. Signed-off-by: Jordan Crouse --- Documentation/gpu/drm-msm-crash-dump.txt | 7 +++ drivers/gpu/drm/msm/adreno/adreno_gpu.c | 58 ++++++++++++++++++++---- drivers/gpu/drm/msm/msm_gpu.c | 48 ++++++++++++++++++-- drivers/gpu/drm/msm/msm_gpu.h | 9 ++++ 4 files changed, 109 insertions(+), 13 deletions(-) diff --git a/Documentation/gpu/drm-msm-crash-dump.txt b/Documentation/gpu/drm-msm-crash-dump.txt index 7083075c6f87..b9804dd112db 100644 --- a/Documentation/gpu/drm-msm-crash-dump.txt +++ b/Documentation/gpu/drm-msm-crash-dump.txt @@ -40,6 +40,13 @@ bos: # List of buffers from the hanging submission (if known) data: # [ascii85] The contents of the ring encoded as ascii85. # Only the unused portions of the ring will be printed # (up to a maximum of 'size' bytes) +bos: # List of buffers from the hanging submission (if known) + -iova: # [hex] GPU address of the buffer + size: # [decimal] Size of the buffer (in bytes) + data: # [ascii85] The contents of the buffer encoded as + # ascii85. Only the contents of buffers marked as + # readable are dumped. Trailing zeros at the end of the + # buffer won't be dumped. registers: # Sets of register values. This section can be used multiple # times for different ranges of registers. Each register will be # on its own line. diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index be81fe1f6a35..ce8b7af0a77d 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -438,6 +438,10 @@ void adreno_gpu_state_destroy(struct msm_gpu_state *state) for (i = 0; i < ARRAY_SIZE(state->ring); i++) kfree(state->ring[i].data); + for (i = 0; state->bos && i < state->nr_bos; i++) + kvfree(state->bos[i].data); + + kfree(state->bos); kfree(state->comm); kfree(state->cmd); kfree(state->registers); @@ -461,6 +465,39 @@ int adreno_gpu_state_put(struct msm_gpu_state *state) } #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP) + +static void adreno_show_object(struct drm_printer *p, u32 *ptr, int len) +{ + char out[ASCII85_BUFSZ]; + long l, datalen, i; + + if (!ptr || !len) + return; + + /* + * Only dump the non-zero part of the buffer - rarely will any data + * completely fill the entire allocated size of the buffer + */ + for (datalen = 0, i = 0; i < len >> 2; i++) { + if (ptr[i]) + datalen = i << 2; + } + + /* Skip printing the object if it is empty */ + if (datalen == 0) + return; + + l = ascii85_encode_len(datalen); + + drm_puts(p, " data: !!ascii85 |\n"); + drm_puts(p, " "); + + for (i = 0; i < l; i++) + drm_puts(p, ascii85_encode(ptr[i], out)); + + drm_puts(p, "\n"); +} + void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state, struct drm_printer *p) { @@ -487,19 +524,20 @@ void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state, drm_printf(p, " wptr: %d\n", state->ring[i].wptr); drm_printf(p, " size: %d\n", MSM_GPU_RINGBUFFER_SZ); - if (state->ring[i].data && state->ring[i].data_size) { - u32 *ptr = (u32 *) state->ring[i].data; - char out[ASCII85_BUFSZ]; - long len = ascii85_encode_len(state->ring[i].data_size); - int j; + adreno_show_object(p, state->ring[i].data, + state->ring[i].data_size); + } - drm_printf(p, " data: !!ascii85 |\n"); - drm_printf(p, " "); + if (state->bos) { + drm_puts(p, "bos:\n"); - for (j = 0; j < len; j++) - drm_printf(p, ascii85_encode(ptr[j], out)); + for (i = 0; i < state->nr_bos; i++) { + drm_printf(p, " - iova: 0x%016llx\n", + state->bos[i].iova); + drm_printf(p, " size: %ld\n", state->bos[i].size); - drm_printf(p, "\n"); + adreno_show_object(p, state->bos[i].data, + state->bos[i].size); } } diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 1945736fc448..03e62f6ea2b6 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -318,8 +318,39 @@ static void msm_gpu_devcoredump_free(void *data) msm_gpu_crashstate_put(gpu); } -static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, char *comm, - char *cmd) +static void msm_gpu_crashstate_get_bo(struct msm_gpu_state *state, + struct msm_gem_object *obj, u64 iova, u32 flags) +{ + struct msm_gpu_state_bo *state_bo = &state->bos[state->nr_bos]; + + /* Don't record write only objects */ + + state_bo->size = obj->base.size; + state_bo->iova = iova; + + /* Only store the data for buffer objects marked for read */ + if ((flags & MSM_SUBMIT_BO_READ)) { + void *ptr; + + state_bo->data = kvmalloc(obj->base.size, GFP_KERNEL); + if (!state_bo->data) + return; + + ptr = msm_gem_get_vaddr_active(&obj->base); + if (IS_ERR(ptr)) { + kvfree(state_bo->data); + return; + } + + memcpy(state_bo->data, ptr, obj->base.size); + msm_gem_put_vaddr(&obj->base); + } + + state->nr_bos++; +} + +static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, + struct msm_gem_submit *submit, char *comm, char *cmd) { struct msm_gpu_state *state; @@ -335,6 +366,17 @@ static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, char *comm, state->comm = kstrdup(comm, GFP_KERNEL); state->cmd = kstrdup(cmd, GFP_KERNEL); + if (submit) { + int i; + + state->bos = kcalloc(submit->nr_bos, + sizeof(struct msm_gpu_state_bo), GFP_KERNEL); + + for (i = 0; state->bos && i < submit->nr_bos; i++) + msm_gpu_crashstate_get_bo(state, submit->bos[i].obj, + submit->bos[i].iova, submit->bos[i].flags); + } + /* Set the active crash state to be dumped on failure */ gpu->crashstate = state; @@ -434,7 +476,7 @@ static void recover_worker(struct work_struct *work) /* Record the crash state */ pm_runtime_get_sync(&gpu->pdev->dev); - msm_gpu_crashstate_capture(gpu, comm, cmd); + msm_gpu_crashstate_capture(gpu, submit, comm, cmd); pm_runtime_put_sync(&gpu->pdev->dev); kfree(cmd); diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 48f7b21f1cae..8242c6e0f107 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -181,6 +181,12 @@ struct msm_gpu_submitqueue { struct kref ref; }; +struct msm_gpu_state_bo { + u64 iova; + size_t size; + void *data; +}; + struct msm_gpu_state { struct kref ref; struct timeval time; @@ -201,6 +207,9 @@ struct msm_gpu_state { char *comm; char *cmd; + + int nr_bos; + struct msm_gpu_state_bo *bos; }; static inline void gpu_write(struct msm_gpu *gpu, u32 reg, u32 data)