| Message ID | 20180703194812.154013-1-seanpaul@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Andy Gross |
| Headers | show |
On 2018-07-04 01:18, Sean Paul wrote: > Signed-off-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Rajesh Yadav <ryadav@codeaurora.org> > --- > .../boot/dts/qcom/sdm845-dpu-display.dtsi | 248 -------------- > arch/arm64/boot/dts/qcom/sdm845-dpu.dtsi | 323 ------------------ > 2 files changed, 571 deletions(-) > delete mode 100644 arch/arm64/boot/dts/qcom/sdm845-dpu-display.dtsi > delete mode 100644 arch/arm64/boot/dts/qcom/sdm845-dpu.dtsi > > diff --git a/arch/arm64/boot/dts/qcom/sdm845-dpu-display.dtsi > b/arch/arm64/boot/dts/qcom/sdm845-dpu-display.dtsi > deleted file mode 100644 > index 294efaee9a19..000000000000 > --- a/arch/arm64/boot/dts/qcom/sdm845-dpu-display.dtsi > +++ /dev/null > @@ -1,248 +0,0 @@ > -/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. > - * > - * This program is free software; you can redistribute it and/or > modify > - * it under the terms of the GNU General Public License version 2 and > - * only version 2 as published by the Free Software Foundation. > - * > - * This program is distributed in the hope that it will be useful, > - * but WITHOUT ANY WARRANTY; without even the implied warranty of > - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > - * GNU General Public License for more details. > - */ > - > -#include "dsi-panel-nt35597-truly-dualmipi-wqxga-video.dtsi" > -#include "dsi-panel-nt35597-truly-dualmipi-wqxga-cmd.dtsi" > -#include "dsi-panel-nt35597-truly-dsc-wqxga-cmd.dtsi" > -#include "dsi-panel-nt35597-truly-dsc-wqxga-video.dtsi" > -#include <dt-bindings/clock/mdss-10nm-pll-clk.h> > - > -&soc { > - dsi_panel_pwr_supply: dsi_panel_pwr_supply { > - #address-cells = <1>; > - #size-cells = <0>; > - > - qcom,panel-supply-entry@0 { > - reg = <0>; > - qcom,supply-name = "vddio"; > - qcom,supply-min-voltage = <1800000>; > - qcom,supply-max-voltage = <1800000>; > - qcom,supply-enable-load = <62000>; > - qcom,supply-disable-load = <80>; > - qcom,supply-post-on-sleep = <20>; > - }; > - > - qcom,panel-supply-entry@1 { > - reg = <1>; > - qcom,supply-name = "lab"; > - qcom,supply-min-voltage = <4600000>; > - qcom,supply-max-voltage = <6000000>; > - qcom,supply-enable-load = <100000>; > - qcom,supply-disable-load = <100>; > - }; > - > - qcom,panel-supply-entry@2 { > - reg = <2>; > - qcom,supply-name = "ibb"; > - qcom,supply-min-voltage = <4600000>; > - qcom,supply-max-voltage = <6000000>; > - qcom,supply-enable-load = <100000>; > - qcom,supply-disable-load = <100>; > - qcom,supply-post-on-sleep = <20>; > - }; > - }; > - > - dsi_dual_nt35597_truly_video_display: qcom,dsi-display@4 { > - compatible = "qcom,dsi-display"; > - label = "dsi_dual_nt35597_truly_video_display"; > - qcom,display-type = "primary"; > - > - qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>; > - qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>; > - clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>, > - <&mdss_dsi0_pll PCLK_MUX_0_CLK>; > - clock-names = "src_byte_clk", "src_pixel_clk"; > - > - pinctrl-names = "panel_active", "panel_suspend"; > - pinctrl-0 = <&dpu_dsi_active &dpu_te_active>; > - pinctrl-1 = <&dpu_dsi_suspend &dpu_te_suspend>; > - qcom,platform-reset-gpio = <&tlmm 6 0>; > - qcom,panel-mode-gpio = <&tlmm 52 0>; > - > - qcom,dsi-panel = <&dsi_dual_nt35597_truly_video>; > - vddio-supply = <&pm8998_l14>; > - lab-supply = <&lab_regulator>; > - ibb-supply = <&ibb_regulator>; > - }; > - > - dsi_dual_nt35597_truly_cmd_display: qcom,dsi-display@5 { > - compatible = "qcom,dsi-display"; > - label = "dsi_dual_nt35597_truly_cmd_display"; > - qcom,display-type = "primary"; > - > - qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>; > - qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>; > - clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>, > - <&mdss_dsi0_pll PCLK_MUX_0_CLK>; > - clock-names = "src_byte_clk", "src_pixel_clk"; > - > - pinctrl-names = "panel_active", "panel_suspend"; > - pinctrl-0 = <&dpu_dsi_active &dpu_te_active>; > - pinctrl-1 = <&dpu_dsi_suspend &dpu_te_suspend>; > - qcom,platform-te-gpio = <&tlmm 10 0>; > - qcom,platform-reset-gpio = <&tlmm 6 0>; > - qcom,panel-mode-gpio = <&tlmm 52 0>; > - > - qcom,dsi-panel = <&dsi_dual_nt35597_truly_cmd>; > - vddio-supply = <&pm8998_l14>; > - lab-supply = <&lab_regulator>; > - ibb-supply = <&ibb_regulator>; > - }; > - > - dsi_nt35597_truly_dsc_cmd_display: qcom,dsi-display@6 { > - compatible = "qcom,dsi-display"; > - label = "dsi_nt35597_truly_dsc_cmd_display"; > - qcom,display-type = "primary"; > - > - qcom,dsi-ctrl = <&mdss_dsi1>; > - qcom,dsi-phy = <&mdss_dsi_phy1>; > - clocks = <&mdss_dsi1_pll BYTECLK_MUX_1_CLK>, > - <&mdss_dsi1_pll PCLK_MUX_1_CLK>; > - clock-names = "src_byte_clk", "src_pixel_clk"; > - > - pinctrl-names = "panel_active", "panel_suspend"; > - pinctrl-0 = <&dpu_dsi_active &dpu_te_active>; > - pinctrl-1 = <&dpu_dsi_suspend &dpu_te_suspend>; > - qcom,platform-te-gpio = <&tlmm 10 0>; > - qcom,platform-reset-gpio = <&tlmm 6 0>; > - qcom,panel-mode-gpio = <&tlmm 52 0>; > - > - qcom,dsi-panel = <&dsi_nt35597_truly_dsc_cmd>; > - vddio-supply = <&pm8998_l14>; > - lab-supply = <&lab_regulator>; > - ibb-supply = <&ibb_regulator>; > - }; > - > - dsi_nt35597_truly_dsc_video_display: qcom,dsi-display@7 { > - compatible = "qcom,dsi-display"; > - label = "dsi_nt35597_truly_dsc_video_display"; > - qcom,display-type = "primary"; > - > - qcom,dsi-ctrl = <&mdss_dsi1>; > - qcom,dsi-phy = <&mdss_dsi_phy1>; > - clocks = <&mdss_dsi1_pll BYTECLK_MUX_1_CLK>, > - <&mdss_dsi1_pll PCLK_MUX_1_CLK>; > - clock-names = "src_byte_clk", "src_pixel_clk"; > - > - pinctrl-names = "panel_active", "panel_suspend"; > - pinctrl-0 = <&dpu_dsi_active &dpu_te_active>; > - pinctrl-1 = <&dpu_dsi_suspend &dpu_te_suspend>; > - qcom,platform-te-gpio = <&tlmm 10 0>; > - qcom,platform-reset-gpio = <&tlmm 6 0>; > - qcom,panel-mode-gpio = <&tlmm 52 0>; > - > - qcom,dsi-panel = <&dsi_nt35597_truly_dsc_video>; > - vddio-supply = <&pm8998_l14>; > - lab-supply = <&lab_regulator>; > - ibb-supply = <&ibb_regulator>; > - }; > - > - dpu_wb: qcom,wb-display@0 { > - compatible = "qcom,wb-display"; > - cell-index = <0>; > - label = "wb_display"; > - }; > - > - ext_disp: qcom,msm-ext-disp { > - compatible = "qcom,msm-ext-disp"; > - > - ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx { > - compatible = "qcom,msm-ext-disp-audio-codec-rx"; > - }; > - }; > -}; > - > -&dpu_dp { > - qcom,dp-usbpd-detection = </*&pmi8998_pdphy*/>; > - qcom,ext-disp = <&ext_disp>; > - > - pinctrl-names = "mdss_dp_active", "mdss_dp_sleep"; > - pinctrl-0 = <&dpu_dp_aux_active &dpu_dp_usbplug_cc_active>; > - pinctrl-1 = <&dpu_dp_aux_suspend &dpu_dp_usbplug_cc_suspend>; > - qcom,aux-en-gpio = <&tlmm 43 0>; > - qcom,aux-sel-gpio = <&tlmm 51 0>; > - qcom,usbplug-cc-gpio = <&tlmm 38 0>; > -}; > - > -&mdss_mdp { > - connectors = <&dpu_wb>; > -}; > - > -&dsi_dual_nt35597_truly_video { > - qcom,mdss-dsi-t-clk-post = <0x0D>; > - qcom,mdss-dsi-t-clk-pre = <0x2D>; > - qcom,mdss-dsi-min-refresh-rate = <53>; > - qcom,mdss-dsi-max-refresh-rate = <60>; > - qcom,mdss-dsi-pan-enable-dynamic-fps; > - qcom,mdss-dsi-pan-fps-update = > - "dfps_immediate_porch_mode_vfp"; > - qcom,mdss-dsi-display-timings { > - timing@0{ > - qcom,mdss-dsi-panel-phy-timings = [00 1c 07 07 23 21 07 > - 07 05 03 04 00]; > - qcom,display-topology = <2 0 2>, > - <1 0 2>; > - qcom,default-topology-index = <0>; > - }; > - }; > -}; > - > -&dsi_dual_nt35597_truly_cmd { > - qcom,mdss-dsi-t-clk-post = <0x0D>; > - qcom,mdss-dsi-t-clk-pre = <0x2D>; > - qcom,mdss-dsi-display-timings { > - timing@0{ > - qcom,mdss-dsi-panel-phy-timings = [00 1c 07 07 23 21 07 > - 07 05 03 04 00]; > - qcom,display-topology = <2 0 2>, > - <1 0 2>; > - qcom,default-topology-index = <0>; > - }; > - }; > -}; > - > -&dsi_nt35597_truly_dsc_cmd { > - qcom,mdss-dsi-t-clk-post = <0x0b>; > - qcom,mdss-dsi-t-clk-pre = <0x23>; > - qcom,ulps-enabled; > - qcom,mdss-dsi-display-timings { > - timing@0{ > - qcom,mdss-dsi-panel-phy-timings = [00 15 05 05 20 1f 05 > - 05 03 03 04 00]; > - qcom,display-topology = <1 1 1>, > - <2 2 1>, /* dsc merge */ > - <2 1 1>; /* 3d mux */ > - qcom,default-topology-index = <1>; > - }; > - }; > -}; > - > -&dsi_nt35597_truly_dsc_video { > - qcom,mdss-dsi-t-clk-post = <0x0b>; > - qcom,mdss-dsi-t-clk-pre = <0x23>; > - qcom,mdss-dsi-min-refresh-rate = <53>; > - qcom,mdss-dsi-max-refresh-rate = <60>; > - qcom,mdss-dsi-pan-enable-dynamic-fps; > - qcom,mdss-dsi-pan-fps-update = > - "dfps_immediate_porch_mode_vfp"; > - qcom,mdss-dsi-display-timings { > - timing@0{ > - qcom,mdss-dsi-panel-phy-timings = [00 15 05 05 20 1f 05 > - 04 03 03 04 00]; > - qcom,display-topology = <1 1 1>, > - <2 2 1>, /* dsc merge */ > - <2 1 1>; /* 3d mux */ > - qcom,default-topology-index = <1>; > - }; > - }; > -}; > - > diff --git a/arch/arm64/boot/dts/qcom/sdm845-dpu.dtsi > b/arch/arm64/boot/dts/qcom/sdm845-dpu.dtsi > deleted file mode 100644 > index 89b860cd76dc..000000000000 > --- a/arch/arm64/boot/dts/qcom/sdm845-dpu.dtsi > +++ /dev/null > @@ -1,323 +0,0 @@ > -/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. > - * > - * This program is free software; you can redistribute it and/or > modify > - * it under the terms of the GNU General Public License version 2 and > - * only version 2 as published by the Free Software Foundation. > - * > - * This program is distributed in the hope that it will be useful, > - * but WITHOUT ANY WARRANTY; without even the implied warranty of > - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > - * GNU General Public License for more details. > - */ > -#include <dt-bindings/clock/mdss-10nm-pll-clk.h> > - > -&soc { > - mdss_mdp: qcom,mdss_mdp@ae00000 { > - compatible = "qcom,dpu-kms"; > - reg = <0x0ae00000 0x81d40>, > - <0x0aeb0000 0x2008>; > - reg-names = "mdp_phys", > - "vbif_phys"; > - > - power-domains = <&clock_dispcc 0>; > - clocks = > - <&gcc GCC_DISP_AHB_CLK>, > - <&gcc GCC_DISP_AXI_CLK>, > - <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, > - <&clock_dispcc DISP_CC_MDSS_AXI_CLK>, > - <&clock_dispcc DISP_CC_MDSS_MDP_CLK>, > - <&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>; > - clock-names = "gcc_iface", "gcc_bus", "iface_clk", > - "bus_clk", "core_clk", "vsync_clk"; > - clock-rate = <0 0 0 0 300000000 19200000 0>; > - clock-max-rate = <0 0 0 0 412500000 19200000 0>; > - > - /*dpu-vdd-supply = <&mdss_core_gdsc>;*/ > - > - /* interrupt config */ > - interrupt-parent = </*&pdc*/>; > - interrupts = <0 83 0>; > - interrupt-controller; > - #interrupt-cells = <1>; > - iommus = <&apps_smmu 0x880 0x8>, > - <&apps_smmu 0xc80 0x8>; > - > - #address-cells = <1>; > - #size-cells = <0>; > - > - #power-domain-cells = <0>; > - > - qcom,dpu-dram-channels = <2>; > - qcom,dpu-num-nrt-paths = <0>; > - > - qcom,platform-supply-entries { > - #address-cells = <1>; > - #size-cells = <0>; > - > - qcom,platform-supply-entry@0 { > - reg = <0>; > - qcom,supply-name = "dpu-vdd"; > - qcom,supply-min-voltage = <0>; > - qcom,supply-max-voltage = <0>; > - qcom,supply-enable-load = <0>; > - qcom,supply-disable-load = <0>; > - }; > - }; > - > - /* data and reg bus scale settings */ > - qcom,dpu-data-bus { > - qcom,msm-bus,name = "mdss_dpu_mnoc"; > - qcom,msm-bus,num-cases = <3>; > - qcom,msm-bus,num-paths = <2>; > - qcom,msm-bus,vectors-KBps = > - <22 773 0 0>, <23 773 0 0>, > - <22 773 0 6400000>, <23 773 0 6400000>, > - <22 773 0 6400000>, <23 773 0 6400000>; > - }; > - > - qcom,dpu-ebi-bus { > - qcom,msm-bus,name = "mdss_dpu_ebi"; > - qcom,msm-bus,num-cases = <3>; > - qcom,msm-bus,num-paths = <1>; > - qcom,msm-bus,vectors-KBps = > - <129 512 0 0>, > - <129 512 0 6400000>, > - <129 512 0 6400000>; > - }; > - > - qcom,dpu-reg-bus { > - qcom,msm-bus,name = "mdss_reg"; > - qcom,msm-bus,num-cases = <4>; > - qcom,msm-bus,num-paths = <1>; > - qcom,msm-bus,active-only; > - qcom,msm-bus,vectors-KBps = > - <1 590 0 0>, > - <1 590 0 76800>, > - <1 590 0 150000>, > - <1 590 0 300000>; > - }; > - }; > - > - mdss_dsi0: qcom,mdss_dsi_ctrl0@ae94000 { > - compatible = "qcom,dsi-ctrl-hw-v2.2"; > - label = "dsi-ctrl-0"; > - cell-index = <0>; > - reg = <0xae94000 0x400>, > - <0xaf08000 0x4>; > - reg-names = "dsi_ctrl", "disp_cc_base"; > - interrupt-parent = <&mdss_mdp>; > - interrupts = <4 0>; > - vdda-1p2-supply = <&pm8998_l26>; > - clocks = <&clock_dispcc DISP_CC_MDSS_BYTE0_CLK>, > - <&clock_dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, > - <&clock_dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, > - <&clock_dispcc DISP_CC_MDSS_PCLK0_CLK>, > - <&clock_dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>, > - <&clock_dispcc DISP_CC_MDSS_ESC0_CLK>; > - clock-names = "byte_clk", "byte_clk_rcg", "byte_intf_clk", > - "pixel_clk", "pixel_clk_rcg", > - "esc_clk"; > - qcom,null-insertion-enabled; > - qcom,ctrl-supply-entries { > - #address-cells = <1>; > - #size-cells = <0>; > - > - qcom,ctrl-supply-entry@0 { > - reg = <0>; > - qcom,supply-name = "vdda-1p2"; > - qcom,supply-min-voltage = <1200000>; > - qcom,supply-max-voltage = <1200000>; > - qcom,supply-enable-load = <21800>; > - qcom,supply-disable-load = <4>; > - }; > - }; > - }; > - > - mdss_dsi1: qcom,mdss_dsi_ctrl1@ae96000 { > - compatible = "qcom,dsi-ctrl-hw-v2.2"; > - label = "dsi-ctrl-1"; > - cell-index = <1>; > - reg = <0xae96000 0x400>, > - <0xaf08000 0x4>; > - reg-names = "dsi_ctrl", "disp_cc_base"; > - interrupt-parent = <&mdss_mdp>; > - interrupts = <5 0>; > - vdda-1p2-supply = <&pm8998_l26>; > - clocks = <&clock_dispcc DISP_CC_MDSS_BYTE1_CLK>, > - <&clock_dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, > - <&clock_dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, > - <&clock_dispcc DISP_CC_MDSS_PCLK1_CLK>, > - <&clock_dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>, > - <&clock_dispcc DISP_CC_MDSS_ESC1_CLK>; > - clock-names = "byte_clk", "byte_clk_rcg", "byte_intf_clk", > - "pixel_clk", "pixel_clk_rcg", "esc_clk"; > - qcom,null-insertion-enabled; > - qcom,ctrl-supply-entries { > - #address-cells = <1>; > - #size-cells = <0>; > - > - qcom,ctrl-supply-entry@0 { > - reg = <0>; > - qcom,supply-name = "vdda-1p2"; > - qcom,supply-min-voltage = <1200000>; > - qcom,supply-max-voltage = <1200000>; > - qcom,supply-enable-load = <21800>; > - qcom,supply-disable-load = <4>; > - }; > - }; > - }; > - > - mdss_dsi_phy0: qcom,mdss_dsi_phy0@ae94400 { > - compatible = "qcom,dsi-phy-v3.0"; > - label = "dsi-phy-0"; > - cell-index = <0>; > - reg = <0xae94400 0x7c0>; > - reg-names = "dsi_phy"; > - /*gdsc-supply = <&mdss_core_gdsc>;*/ > - vdda-0p9-supply = <&pm8998_l1>; > - qcom,platform-strength-ctrl = [55 03 > - 55 03 > - 55 03 > - 55 03 > - 55 00]; > - qcom,platform-lane-config = [00 00 00 00 > - 00 00 00 00 > - 00 00 00 00 > - 00 00 00 00 > - 00 00 00 80]; > - qcom,platform-regulator-settings = [1d 1d 1d 1d 1d]; > - qcom,phy-supply-entries { > - #address-cells = <1>; > - #size-cells = <0>; > - qcom,phy-supply-entry@0 { > - reg = <0>; > - qcom,supply-name = "vdda-0p9"; > - qcom,supply-min-voltage = <880000>; > - qcom,supply-max-voltage = <880000>; > - qcom,supply-enable-load = <36000>; > - qcom,supply-disable-load = <32>; > - }; > - }; > - }; > - > - mdss_dsi_phy1: qcom,mdss_dsi_phy0@ae96400 { > - compatible = "qcom,dsi-phy-v3.0"; > - label = "dsi-phy-1"; > - cell-index = <1>; > - reg = <0xae96400 0x7c0>; > - reg-names = "dsi_phy"; > - /*gdsc-supply = <&mdss_core_gdsc>;*/ > - vdda-0p9-supply = <&pm8998_l1>; > - qcom,platform-strength-ctrl = [55 03 > - 55 03 > - 55 03 > - 55 03 > - 55 00]; > - qcom,platform-regulator-settings = [1d 1d 1d 1d 1d]; > - qcom,platform-lane-config = [00 00 00 00 > - 00 00 00 00 > - 00 00 00 00 > - 00 00 00 00 > - 00 00 00 80]; > - qcom,phy-supply-entries { > - #address-cells = <1>; > - #size-cells = <0>; > - qcom,phy-supply-entry@0 { > - reg = <0>; > - qcom,supply-name = "vdda-0p9"; > - qcom,supply-min-voltage = <880000>; > - qcom,supply-max-voltage = <880000>; > - qcom,supply-enable-load = <36000>; > - qcom,supply-disable-load = <32>; > - }; > - }; > - }; > - > - dpu_dp: qcom,dp_display@0{ > - status = "disabled"; > - cell-index = <0>; > - compatible = "qcom,dp-display"; > - /*gdsc-supply = <&mdss_core_gdsc>;*/ > - vdda-1p2-supply = <&pm8998_l26>; > - vdda-0p9-supply = <&pm8998_l1>; > - > - reg = <0xae90000 0x0dc>, > - <0xae90200 0x0c0>, > - <0xae90400 0x508>, > - <0xae90a00 0x094>, > - <0x88eaa00 0x200>, > - <0x88ea200 0x200>, > - <0x88ea600 0x200>, > - <0xaf02000 0x1a0>, > - <0x780000 0x621c>, > - <0x88ea030 0x10>, > - <0x88e8000 0x20>, > - <0x0aee1000 0x034>; > - /* dp_ctrl: dp_ahb, dp_aux, dp_link, dp_p0 */ > - reg-names = "dp_ahb", "dp_aux", "dp_link", > - "dp_p0", "dp_phy", "dp_ln_tx0", "dp_ln_tx1", > - "dp_mmss_cc", "qfprom_physical", "dp_pll", > - "usb3_dp_com", "hdcp_physical"; > - > - interrupt-parent = <&mdss_mdp>; > - interrupts = <12 0>; > - > - clocks = <&clock_dispcc DISP_CC_MDSS_DP_AUX_CLK>, > - <&clock_rpmh RPMH_CXO_CLK>, > - <&gcc GCC_USB3_PRIM_CLKREF_CLK>, > - <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, > - <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, > - <&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK>, > - <&clock_dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>, > - <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>, > - <&clock_dispcc DISP_CC_MDSS_DP_CRYPTO_CLK>, > - <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>, > - <&mdss_dp_pll DP_VCO_DIVIDED_CLK_SRC_MUX>; > - clock-names = "core_aux_clk", "core_usb_ref_clk_src", > - "core_usb_ref_clk", "core_usb_cfg_ahb_clk", > - "core_usb_pipe_clk", "ctrl_link_clk", > - "ctrl_link_iface_clk", "ctrl_pixel_clk", > - "crypto_clk", "pixel_clk_rcg", "pixel_parent"; > - > - qcom,aux-cfg0-settings = [20 00]; > - qcom,aux-cfg1-settings = [24 13 23 1d]; > - qcom,aux-cfg2-settings = [28 24]; > - qcom,aux-cfg3-settings = [2c 00]; > - qcom,aux-cfg4-settings = [30 0a]; > - qcom,aux-cfg5-settings = [34 26]; > - qcom,aux-cfg6-settings = [38 0a]; > - qcom,aux-cfg7-settings = [3c 03]; > - qcom,aux-cfg8-settings = [40 bb]; > - qcom,aux-cfg9-settings = [44 03]; > - > - qcom,max-pclk-frequency-khz = <675000>; > - > - qcom,ctrl-supply-entries { > - #address-cells = <1>; > - #size-cells = <0>; > - > - qcom,ctrl-supply-entry@0 { > - reg = <0>; > - qcom,supply-name = "vdda-1p2"; > - qcom,supply-min-voltage = <1200000>; > - qcom,supply-max-voltage = <1200000>; > - qcom,supply-enable-load = <21800>; > - qcom,supply-disable-load = <4>; > - }; > - }; > - > - qcom,phy-supply-entries { > - #address-cells = <1>; > - #size-cells = <0>; > - > - qcom,phy-supply-entry@0 { > - reg = <0>; > - qcom,supply-name = "vdda-0p9"; > - qcom,supply-min-voltage = <880000>; > - qcom,supply-max-voltage = <880000>; > - qcom,supply-enable-load = <36000>; > - qcom,supply-disable-load = <32>; > - }; > - }; > - }; > -}; -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm64/boot/dts/qcom/sdm845-dpu-display.dtsi b/arch/arm64/boot/dts/qcom/sdm845-dpu-display.dtsi deleted file mode 100644 index 294efaee9a19..000000000000 --- a/arch/arm64/boot/dts/qcom/sdm845-dpu-display.dtsi +++ /dev/null @@ -1,248 +0,0 @@ -/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include "dsi-panel-nt35597-truly-dualmipi-wqxga-video.dtsi" -#include "dsi-panel-nt35597-truly-dualmipi-wqxga-cmd.dtsi" -#include "dsi-panel-nt35597-truly-dsc-wqxga-cmd.dtsi" -#include "dsi-panel-nt35597-truly-dsc-wqxga-video.dtsi" -#include <dt-bindings/clock/mdss-10nm-pll-clk.h> - -&soc { - dsi_panel_pwr_supply: dsi_panel_pwr_supply { - #address-cells = <1>; - #size-cells = <0>; - - qcom,panel-supply-entry@0 { - reg = <0>; - qcom,supply-name = "vddio"; - qcom,supply-min-voltage = <1800000>; - qcom,supply-max-voltage = <1800000>; - qcom,supply-enable-load = <62000>; - qcom,supply-disable-load = <80>; - qcom,supply-post-on-sleep = <20>; - }; - - qcom,panel-supply-entry@1 { - reg = <1>; - qcom,supply-name = "lab"; - qcom,supply-min-voltage = <4600000>; - qcom,supply-max-voltage = <6000000>; - qcom,supply-enable-load = <100000>; - qcom,supply-disable-load = <100>; - }; - - qcom,panel-supply-entry@2 { - reg = <2>; - qcom,supply-name = "ibb"; - qcom,supply-min-voltage = <4600000>; - qcom,supply-max-voltage = <6000000>; - qcom,supply-enable-load = <100000>; - qcom,supply-disable-load = <100>; - qcom,supply-post-on-sleep = <20>; - }; - }; - - dsi_dual_nt35597_truly_video_display: qcom,dsi-display@4 { - compatible = "qcom,dsi-display"; - label = "dsi_dual_nt35597_truly_video_display"; - qcom,display-type = "primary"; - - qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>; - qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>; - clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>, - <&mdss_dsi0_pll PCLK_MUX_0_CLK>; - clock-names = "src_byte_clk", "src_pixel_clk"; - - pinctrl-names = "panel_active", "panel_suspend"; - pinctrl-0 = <&dpu_dsi_active &dpu_te_active>; - pinctrl-1 = <&dpu_dsi_suspend &dpu_te_suspend>; - qcom,platform-reset-gpio = <&tlmm 6 0>; - qcom,panel-mode-gpio = <&tlmm 52 0>; - - qcom,dsi-panel = <&dsi_dual_nt35597_truly_video>; - vddio-supply = <&pm8998_l14>; - lab-supply = <&lab_regulator>; - ibb-supply = <&ibb_regulator>; - }; - - dsi_dual_nt35597_truly_cmd_display: qcom,dsi-display@5 { - compatible = "qcom,dsi-display"; - label = "dsi_dual_nt35597_truly_cmd_display"; - qcom,display-type = "primary"; - - qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>; - qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>; - clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>, - <&mdss_dsi0_pll PCLK_MUX_0_CLK>; - clock-names = "src_byte_clk", "src_pixel_clk"; - - pinctrl-names = "panel_active", "panel_suspend"; - pinctrl-0 = <&dpu_dsi_active &dpu_te_active>; - pinctrl-1 = <&dpu_dsi_suspend &dpu_te_suspend>; - qcom,platform-te-gpio = <&tlmm 10 0>; - qcom,platform-reset-gpio = <&tlmm 6 0>; - qcom,panel-mode-gpio = <&tlmm 52 0>; - - qcom,dsi-panel = <&dsi_dual_nt35597_truly_cmd>; - vddio-supply = <&pm8998_l14>; - lab-supply = <&lab_regulator>; - ibb-supply = <&ibb_regulator>; - }; - - dsi_nt35597_truly_dsc_cmd_display: qcom,dsi-display@6 { - compatible = "qcom,dsi-display"; - label = "dsi_nt35597_truly_dsc_cmd_display"; - qcom,display-type = "primary"; - - qcom,dsi-ctrl = <&mdss_dsi1>; - qcom,dsi-phy = <&mdss_dsi_phy1>; - clocks = <&mdss_dsi1_pll BYTECLK_MUX_1_CLK>, - <&mdss_dsi1_pll PCLK_MUX_1_CLK>; - clock-names = "src_byte_clk", "src_pixel_clk"; - - pinctrl-names = "panel_active", "panel_suspend"; - pinctrl-0 = <&dpu_dsi_active &dpu_te_active>; - pinctrl-1 = <&dpu_dsi_suspend &dpu_te_suspend>; - qcom,platform-te-gpio = <&tlmm 10 0>; - qcom,platform-reset-gpio = <&tlmm 6 0>; - qcom,panel-mode-gpio = <&tlmm 52 0>; - - qcom,dsi-panel = <&dsi_nt35597_truly_dsc_cmd>; - vddio-supply = <&pm8998_l14>; - lab-supply = <&lab_regulator>; - ibb-supply = <&ibb_regulator>; - }; - - dsi_nt35597_truly_dsc_video_display: qcom,dsi-display@7 { - compatible = "qcom,dsi-display"; - label = "dsi_nt35597_truly_dsc_video_display"; - qcom,display-type = "primary"; - - qcom,dsi-ctrl = <&mdss_dsi1>; - qcom,dsi-phy = <&mdss_dsi_phy1>; - clocks = <&mdss_dsi1_pll BYTECLK_MUX_1_CLK>, - <&mdss_dsi1_pll PCLK_MUX_1_CLK>; - clock-names = "src_byte_clk", "src_pixel_clk"; - - pinctrl-names = "panel_active", "panel_suspend"; - pinctrl-0 = <&dpu_dsi_active &dpu_te_active>; - pinctrl-1 = <&dpu_dsi_suspend &dpu_te_suspend>; - qcom,platform-te-gpio = <&tlmm 10 0>; - qcom,platform-reset-gpio = <&tlmm 6 0>; - qcom,panel-mode-gpio = <&tlmm 52 0>; - - qcom,dsi-panel = <&dsi_nt35597_truly_dsc_video>; - vddio-supply = <&pm8998_l14>; - lab-supply = <&lab_regulator>; - ibb-supply = <&ibb_regulator>; - }; - - dpu_wb: qcom,wb-display@0 { - compatible = "qcom,wb-display"; - cell-index = <0>; - label = "wb_display"; - }; - - ext_disp: qcom,msm-ext-disp { - compatible = "qcom,msm-ext-disp"; - - ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx { - compatible = "qcom,msm-ext-disp-audio-codec-rx"; - }; - }; -}; - -&dpu_dp { - qcom,dp-usbpd-detection = </*&pmi8998_pdphy*/>; - qcom,ext-disp = <&ext_disp>; - - pinctrl-names = "mdss_dp_active", "mdss_dp_sleep"; - pinctrl-0 = <&dpu_dp_aux_active &dpu_dp_usbplug_cc_active>; - pinctrl-1 = <&dpu_dp_aux_suspend &dpu_dp_usbplug_cc_suspend>; - qcom,aux-en-gpio = <&tlmm 43 0>; - qcom,aux-sel-gpio = <&tlmm 51 0>; - qcom,usbplug-cc-gpio = <&tlmm 38 0>; -}; - -&mdss_mdp { - connectors = <&dpu_wb>; -}; - -&dsi_dual_nt35597_truly_video { - qcom,mdss-dsi-t-clk-post = <0x0D>; - qcom,mdss-dsi-t-clk-pre = <0x2D>; - qcom,mdss-dsi-min-refresh-rate = <53>; - qcom,mdss-dsi-max-refresh-rate = <60>; - qcom,mdss-dsi-pan-enable-dynamic-fps; - qcom,mdss-dsi-pan-fps-update = - "dfps_immediate_porch_mode_vfp"; - qcom,mdss-dsi-display-timings { - timing@0{ - qcom,mdss-dsi-panel-phy-timings = [00 1c 07 07 23 21 07 - 07 05 03 04 00]; - qcom,display-topology = <2 0 2>, - <1 0 2>; - qcom,default-topology-index = <0>; - }; - }; -}; - -&dsi_dual_nt35597_truly_cmd { - qcom,mdss-dsi-t-clk-post = <0x0D>; - qcom,mdss-dsi-t-clk-pre = <0x2D>; - qcom,mdss-dsi-display-timings { - timing@0{ - qcom,mdss-dsi-panel-phy-timings = [00 1c 07 07 23 21 07 - 07 05 03 04 00]; - qcom,display-topology = <2 0 2>, - <1 0 2>; - qcom,default-topology-index = <0>; - }; - }; -}; - -&dsi_nt35597_truly_dsc_cmd { - qcom,mdss-dsi-t-clk-post = <0x0b>; - qcom,mdss-dsi-t-clk-pre = <0x23>; - qcom,ulps-enabled; - qcom,mdss-dsi-display-timings { - timing@0{ - qcom,mdss-dsi-panel-phy-timings = [00 15 05 05 20 1f 05 - 05 03 03 04 00]; - qcom,display-topology = <1 1 1>, - <2 2 1>, /* dsc merge */ - <2 1 1>; /* 3d mux */ - qcom,default-topology-index = <1>; - }; - }; -}; - -&dsi_nt35597_truly_dsc_video { - qcom,mdss-dsi-t-clk-post = <0x0b>; - qcom,mdss-dsi-t-clk-pre = <0x23>; - qcom,mdss-dsi-min-refresh-rate = <53>; - qcom,mdss-dsi-max-refresh-rate = <60>; - qcom,mdss-dsi-pan-enable-dynamic-fps; - qcom,mdss-dsi-pan-fps-update = - "dfps_immediate_porch_mode_vfp"; - qcom,mdss-dsi-display-timings { - timing@0{ - qcom,mdss-dsi-panel-phy-timings = [00 15 05 05 20 1f 05 - 04 03 03 04 00]; - qcom,display-topology = <1 1 1>, - <2 2 1>, /* dsc merge */ - <2 1 1>; /* 3d mux */ - qcom,default-topology-index = <1>; - }; - }; -}; - diff --git a/arch/arm64/boot/dts/qcom/sdm845-dpu.dtsi b/arch/arm64/boot/dts/qcom/sdm845-dpu.dtsi deleted file mode 100644 index 89b860cd76dc..000000000000 --- a/arch/arm64/boot/dts/qcom/sdm845-dpu.dtsi +++ /dev/null @@ -1,323 +0,0 @@ -/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#include <dt-bindings/clock/mdss-10nm-pll-clk.h> - -&soc { - mdss_mdp: qcom,mdss_mdp@ae00000 { - compatible = "qcom,dpu-kms"; - reg = <0x0ae00000 0x81d40>, - <0x0aeb0000 0x2008>; - reg-names = "mdp_phys", - "vbif_phys"; - - power-domains = <&clock_dispcc 0>; - clocks = - <&gcc GCC_DISP_AHB_CLK>, - <&gcc GCC_DISP_AXI_CLK>, - <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, - <&clock_dispcc DISP_CC_MDSS_AXI_CLK>, - <&clock_dispcc DISP_CC_MDSS_MDP_CLK>, - <&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>; - clock-names = "gcc_iface", "gcc_bus", "iface_clk", - "bus_clk", "core_clk", "vsync_clk"; - clock-rate = <0 0 0 0 300000000 19200000 0>; - clock-max-rate = <0 0 0 0 412500000 19200000 0>; - - /*dpu-vdd-supply = <&mdss_core_gdsc>;*/ - - /* interrupt config */ - interrupt-parent = </*&pdc*/>; - interrupts = <0 83 0>; - interrupt-controller; - #interrupt-cells = <1>; - iommus = <&apps_smmu 0x880 0x8>, - <&apps_smmu 0xc80 0x8>; - - #address-cells = <1>; - #size-cells = <0>; - - #power-domain-cells = <0>; - - qcom,dpu-dram-channels = <2>; - qcom,dpu-num-nrt-paths = <0>; - - qcom,platform-supply-entries { - #address-cells = <1>; - #size-cells = <0>; - - qcom,platform-supply-entry@0 { - reg = <0>; - qcom,supply-name = "dpu-vdd"; - qcom,supply-min-voltage = <0>; - qcom,supply-max-voltage = <0>; - qcom,supply-enable-load = <0>; - qcom,supply-disable-load = <0>; - }; - }; - - /* data and reg bus scale settings */ - qcom,dpu-data-bus { - qcom,msm-bus,name = "mdss_dpu_mnoc"; - qcom,msm-bus,num-cases = <3>; - qcom,msm-bus,num-paths = <2>; - qcom,msm-bus,vectors-KBps = - <22 773 0 0>, <23 773 0 0>, - <22 773 0 6400000>, <23 773 0 6400000>, - <22 773 0 6400000>, <23 773 0 6400000>; - }; - - qcom,dpu-ebi-bus { - qcom,msm-bus,name = "mdss_dpu_ebi"; - qcom,msm-bus,num-cases = <3>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,vectors-KBps = - <129 512 0 0>, - <129 512 0 6400000>, - <129 512 0 6400000>; - }; - - qcom,dpu-reg-bus { - qcom,msm-bus,name = "mdss_reg"; - qcom,msm-bus,num-cases = <4>; - qcom,msm-bus,num-paths = <1>; - qcom,msm-bus,active-only; - qcom,msm-bus,vectors-KBps = - <1 590 0 0>, - <1 590 0 76800>, - <1 590 0 150000>, - <1 590 0 300000>; - }; - }; - - mdss_dsi0: qcom,mdss_dsi_ctrl0@ae94000 { - compatible = "qcom,dsi-ctrl-hw-v2.2"; - label = "dsi-ctrl-0"; - cell-index = <0>; - reg = <0xae94000 0x400>, - <0xaf08000 0x4>; - reg-names = "dsi_ctrl", "disp_cc_base"; - interrupt-parent = <&mdss_mdp>; - interrupts = <4 0>; - vdda-1p2-supply = <&pm8998_l26>; - clocks = <&clock_dispcc DISP_CC_MDSS_BYTE0_CLK>, - <&clock_dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, - <&clock_dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, - <&clock_dispcc DISP_CC_MDSS_PCLK0_CLK>, - <&clock_dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>, - <&clock_dispcc DISP_CC_MDSS_ESC0_CLK>; - clock-names = "byte_clk", "byte_clk_rcg", "byte_intf_clk", - "pixel_clk", "pixel_clk_rcg", - "esc_clk"; - qcom,null-insertion-enabled; - qcom,ctrl-supply-entries { - #address-cells = <1>; - #size-cells = <0>; - - qcom,ctrl-supply-entry@0 { - reg = <0>; - qcom,supply-name = "vdda-1p2"; - qcom,supply-min-voltage = <1200000>; - qcom,supply-max-voltage = <1200000>; - qcom,supply-enable-load = <21800>; - qcom,supply-disable-load = <4>; - }; - }; - }; - - mdss_dsi1: qcom,mdss_dsi_ctrl1@ae96000 { - compatible = "qcom,dsi-ctrl-hw-v2.2"; - label = "dsi-ctrl-1"; - cell-index = <1>; - reg = <0xae96000 0x400>, - <0xaf08000 0x4>; - reg-names = "dsi_ctrl", "disp_cc_base"; - interrupt-parent = <&mdss_mdp>; - interrupts = <5 0>; - vdda-1p2-supply = <&pm8998_l26>; - clocks = <&clock_dispcc DISP_CC_MDSS_BYTE1_CLK>, - <&clock_dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, - <&clock_dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, - <&clock_dispcc DISP_CC_MDSS_PCLK1_CLK>, - <&clock_dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>, - <&clock_dispcc DISP_CC_MDSS_ESC1_CLK>; - clock-names = "byte_clk", "byte_clk_rcg", "byte_intf_clk", - "pixel_clk", "pixel_clk_rcg", "esc_clk"; - qcom,null-insertion-enabled; - qcom,ctrl-supply-entries { - #address-cells = <1>; - #size-cells = <0>; - - qcom,ctrl-supply-entry@0 { - reg = <0>; - qcom,supply-name = "vdda-1p2"; - qcom,supply-min-voltage = <1200000>; - qcom,supply-max-voltage = <1200000>; - qcom,supply-enable-load = <21800>; - qcom,supply-disable-load = <4>; - }; - }; - }; - - mdss_dsi_phy0: qcom,mdss_dsi_phy0@ae94400 { - compatible = "qcom,dsi-phy-v3.0"; - label = "dsi-phy-0"; - cell-index = <0>; - reg = <0xae94400 0x7c0>; - reg-names = "dsi_phy"; - /*gdsc-supply = <&mdss_core_gdsc>;*/ - vdda-0p9-supply = <&pm8998_l1>; - qcom,platform-strength-ctrl = [55 03 - 55 03 - 55 03 - 55 03 - 55 00]; - qcom,platform-lane-config = [00 00 00 00 - 00 00 00 00 - 00 00 00 00 - 00 00 00 00 - 00 00 00 80]; - qcom,platform-regulator-settings = [1d 1d 1d 1d 1d]; - qcom,phy-supply-entries { - #address-cells = <1>; - #size-cells = <0>; - qcom,phy-supply-entry@0 { - reg = <0>; - qcom,supply-name = "vdda-0p9"; - qcom,supply-min-voltage = <880000>; - qcom,supply-max-voltage = <880000>; - qcom,supply-enable-load = <36000>; - qcom,supply-disable-load = <32>; - }; - }; - }; - - mdss_dsi_phy1: qcom,mdss_dsi_phy0@ae96400 { - compatible = "qcom,dsi-phy-v3.0"; - label = "dsi-phy-1"; - cell-index = <1>; - reg = <0xae96400 0x7c0>; - reg-names = "dsi_phy"; - /*gdsc-supply = <&mdss_core_gdsc>;*/ - vdda-0p9-supply = <&pm8998_l1>; - qcom,platform-strength-ctrl = [55 03 - 55 03 - 55 03 - 55 03 - 55 00]; - qcom,platform-regulator-settings = [1d 1d 1d 1d 1d]; - qcom,platform-lane-config = [00 00 00 00 - 00 00 00 00 - 00 00 00 00 - 00 00 00 00 - 00 00 00 80]; - qcom,phy-supply-entries { - #address-cells = <1>; - #size-cells = <0>; - qcom,phy-supply-entry@0 { - reg = <0>; - qcom,supply-name = "vdda-0p9"; - qcom,supply-min-voltage = <880000>; - qcom,supply-max-voltage = <880000>; - qcom,supply-enable-load = <36000>; - qcom,supply-disable-load = <32>; - }; - }; - }; - - dpu_dp: qcom,dp_display@0{ - status = "disabled"; - cell-index = <0>; - compatible = "qcom,dp-display"; - /*gdsc-supply = <&mdss_core_gdsc>;*/ - vdda-1p2-supply = <&pm8998_l26>; - vdda-0p9-supply = <&pm8998_l1>; - - reg = <0xae90000 0x0dc>, - <0xae90200 0x0c0>, - <0xae90400 0x508>, - <0xae90a00 0x094>, - <0x88eaa00 0x200>, - <0x88ea200 0x200>, - <0x88ea600 0x200>, - <0xaf02000 0x1a0>, - <0x780000 0x621c>, - <0x88ea030 0x10>, - <0x88e8000 0x20>, - <0x0aee1000 0x034>; - /* dp_ctrl: dp_ahb, dp_aux, dp_link, dp_p0 */ - reg-names = "dp_ahb", "dp_aux", "dp_link", - "dp_p0", "dp_phy", "dp_ln_tx0", "dp_ln_tx1", - "dp_mmss_cc", "qfprom_physical", "dp_pll", - "usb3_dp_com", "hdcp_physical"; - - interrupt-parent = <&mdss_mdp>; - interrupts = <12 0>; - - clocks = <&clock_dispcc DISP_CC_MDSS_DP_AUX_CLK>, - <&clock_rpmh RPMH_CXO_CLK>, - <&gcc GCC_USB3_PRIM_CLKREF_CLK>, - <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, - <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, - <&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK>, - <&clock_dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>, - <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>, - <&clock_dispcc DISP_CC_MDSS_DP_CRYPTO_CLK>, - <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>, - <&mdss_dp_pll DP_VCO_DIVIDED_CLK_SRC_MUX>; - clock-names = "core_aux_clk", "core_usb_ref_clk_src", - "core_usb_ref_clk", "core_usb_cfg_ahb_clk", - "core_usb_pipe_clk", "ctrl_link_clk", - "ctrl_link_iface_clk", "ctrl_pixel_clk", - "crypto_clk", "pixel_clk_rcg", "pixel_parent"; - - qcom,aux-cfg0-settings = [20 00]; - qcom,aux-cfg1-settings = [24 13 23 1d]; - qcom,aux-cfg2-settings = [28 24]; - qcom,aux-cfg3-settings = [2c 00]; - qcom,aux-cfg4-settings = [30 0a]; - qcom,aux-cfg5-settings = [34 26]; - qcom,aux-cfg6-settings = [38 0a]; - qcom,aux-cfg7-settings = [3c 03]; - qcom,aux-cfg8-settings = [40 bb]; - qcom,aux-cfg9-settings = [44 03]; - - qcom,max-pclk-frequency-khz = <675000>; - - qcom,ctrl-supply-entries { - #address-cells = <1>; - #size-cells = <0>; - - qcom,ctrl-supply-entry@0 { - reg = <0>; - qcom,supply-name = "vdda-1p2"; - qcom,supply-min-voltage = <1200000>; - qcom,supply-max-voltage = <1200000>; - qcom,supply-enable-load = <21800>; - qcom,supply-disable-load = <4>; - }; - }; - - qcom,phy-supply-entries { - #address-cells = <1>; - #size-cells = <0>; - - qcom,phy-supply-entry@0 { - reg = <0>; - qcom,supply-name = "vdda-0p9"; - qcom,supply-min-voltage = <880000>; - qcom,supply-max-voltage = <880000>; - qcom,supply-enable-load = <36000>; - qcom,supply-disable-load = <32>; - }; - }; - }; -};
Signed-off-by: Sean Paul <seanpaul@chromium.org> --- .../boot/dts/qcom/sdm845-dpu-display.dtsi | 248 -------------- arch/arm64/boot/dts/qcom/sdm845-dpu.dtsi | 323 ------------------ 2 files changed, 571 deletions(-) delete mode 100644 arch/arm64/boot/dts/qcom/sdm845-dpu-display.dtsi delete mode 100644 arch/arm64/boot/dts/qcom/sdm845-dpu.dtsi