From patchwork Fri Jul 20 20:43:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 10538323 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E8C5A604D3 for ; Fri, 20 Jul 2018 20:45:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D32EB28ECC for ; Fri, 20 Jul 2018 20:45:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C672428EDA; Fri, 20 Jul 2018 20:45:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5A17128F19 for ; Fri, 20 Jul 2018 20:45:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728167AbeGTVez (ORCPT ); Fri, 20 Jul 2018 17:34:55 -0400 Received: from mail-yb0-f194.google.com ([209.85.213.194]:39873 "EHLO mail-yb0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728157AbeGTVez (ORCPT ); Fri, 20 Jul 2018 17:34:55 -0400 Received: by mail-yb0-f194.google.com with SMTP id k124-v6so5116784ybk.6 for ; Fri, 20 Jul 2018 13:44:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gYXpHiCTPc4RtDB3MZdUKAZeCgTIXb3Yvs4/OyymcNc=; b=VVPYakaGRWLto+Afrl8AOo91XYQDiFIuWkzgpcAQwrwel7lMTKEYpWfKMih2d4DaMt +0OEjJCEMiQeemEjmt+14rppKHRPrpY+B74hoGT31+QO+fsUWZXlgDvxtk1WYybrizmq oIllH/ALGJYNZF2px0OjuHntn7795od7gQFzM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gYXpHiCTPc4RtDB3MZdUKAZeCgTIXb3Yvs4/OyymcNc=; b=PBE9b6moKsnzEWRFNANqwPZPSTtKAD9sdySmFoPdQckxaB9PUd248e9EqMycHWYIpz qG5zQJmyu2WHA7NkRWgf/lTF5V4fkyL++q5ogcEXRWDsgpoQrdKnNqeaBcFXz8IKvGJF PPAWMtJah9Qx45WszjkV6SkC6Ks15DvYqyyZznRyDhF5E3AR86fTli2EbCoqATPDf+iU DKu62s+3/qcpz1bIt2WhmCiBXn4FsHK59ALrtPBAxh430KL1jDEHSPlIip3WDUiIqFNU RLZzLS8Qx3HcH6vQajeBiB/fJjpytadkWlsG9fgOqzKbwojwiCL+YzDaWF58u1wAgoz4 AUTw== X-Gm-Message-State: AOUpUlF1pEzZWJ9qp5zmy2Q2RlexOQwKcVJsKsgCWZ4Va69uKujDEdyF kPGq2htpY9et46iaO8tpeQDtrg== X-Google-Smtp-Source: AAOMgpcyzHPjVnNi0/V5lWWUxRS3IthNMYypppMUVoGneMzWJh7r7TO3nteci0DDMiCrgW7tCFM91Q== X-Received: by 2002:a25:e785:: with SMTP id e127-v6mr1890855ybh.358.1532119498659; Fri, 20 Jul 2018 13:44:58 -0700 (PDT) Received: from rosewood.cam.corp.google.com ([2620:0:1013:11:ad55:b1db:adfe:3b9f]) by smtp.gmail.com with ESMTPSA id a2-v6sm2453831ywm.7.2018.07.20.13.44.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 20 Jul 2018 13:44:58 -0700 (PDT) From: Sean Paul To: abhinavk@codeaurora.org, architt@codeaurora.org, chandanu@codeaurora.org, jsanka@codeaurora.org, jcrouse@codeaurora.org, ryadav@codeaurora.org, seanpaul@chromium.org, skolluku@codeaurora.org, dri-devel@lists.freedesktop.org, robdclark@gmail.com, airlied@linux.ie, freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, nganji@codeaurora.org, hoegsberg@chromium.org, dovizu@chromium.org, robh+dt@kernel.org Cc: Sibi Sankar , Stefan Agner Subject: [PATCH v3 11/19] drm/msm: higher values of pclk can exceed 32 bits when multiplied by a factor Date: Fri, 20 Jul 2018 16:43:02 -0400 Message-Id: <20180720204315.19054-12-seanpaul@chromium.org> X-Mailer: git-send-email 2.18.0.233.g985f88cf7e-goog In-Reply-To: <20180720204315.19054-1-seanpaul@chromium.org> References: <20180720204315.19054-1-seanpaul@chromium.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Abhinav Kumar Make the pclk_rate u64 to accommodate higher pixel clock rates. Changes in v3: - Converted pclk_rate to u32 (Archit) - Rebase on dsi cleanup set in msm-next Cc: Sibi Sankar Cc: Archit Taneja Signed-off-by: Abhinav Kumar Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/dsi/dsi_host.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index f6c6eddbcec7..dff8e88efb66 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -702,6 +702,7 @@ int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_dual_dsi) u8 lanes = msm_host->lanes; u32 bpp = dsi_get_bpp(msm_host->format); u32 pclk_rate; + u64 pclk_bpp; unsigned int esc_mhz, esc_div; unsigned long byte_mhz; @@ -716,13 +717,15 @@ int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_dual_dsi) if (is_dual_dsi) pclk_rate /= 2; + pclk_bpp = pclk_rate * bpp; if (lanes > 0) { - msm_host->byte_clk_rate = (pclk_rate * bpp) / (8 * lanes); + do_div(pclk_bpp, (8 * lanes)); } else { pr_err("%s: forcing mdss_dsi lanes to 1\n", __func__); - msm_host->byte_clk_rate = (pclk_rate * bpp) / 8; + do_div(pclk_bpp, 8); } msm_host->pixel_clk_rate = pclk_rate; + msm_host->byte_clk_rate = pclk_bpp; DBG("pclk=%d, bclk=%d", msm_host->pixel_clk_rate, msm_host->byte_clk_rate);