From patchwork Wed Jul 25 22:28:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 10544891 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 14544112E for ; Wed, 25 Jul 2018 22:29:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 01A512AA28 for ; Wed, 25 Jul 2018 22:29:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E8B312AA2F; Wed, 25 Jul 2018 22:29:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8D7CC2AA28 for ; Wed, 25 Jul 2018 22:29:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731667AbeGYXnD (ORCPT ); Wed, 25 Jul 2018 19:43:03 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:35470 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731585AbeGYXmu (ORCPT ); Wed, 25 Jul 2018 19:42:50 -0400 Received: by mail-pf1-f195.google.com with SMTP id q7-v6so2144122pff.2 for ; Wed, 25 Jul 2018 15:29:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=St6GA7EQfesMvQkxgGbb3MU3M3YjzaV9AWMKmBCouNo=; b=Hh8ZFtM/GapFvbm5ucHLFHNKCW92R6+horDtCwxwjcdi7MhrY6qhdP4UIHzCxw0L53 0gSdt0oJNJ368s/PDcQ+byBuf/gjxGcQui8loS9TE53cZuSi4aELuW5tWyIKyPDJx8CA uAq1OgXxIZji+GT1G5EyQ00MbfWbtm4xmpRXU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=St6GA7EQfesMvQkxgGbb3MU3M3YjzaV9AWMKmBCouNo=; b=PwKnam6AmI9cmnbcx0UfcGgi9EbsB/8jnNnLPMyJiQ2lgkviNQlmxShd4qjfQAx4do nQOyvz2zHyHOuACVaZedATwZlKdMFaW8oLjds4NHy54F4VNenCohPFi9eeGFv9fjPscZ /BV8dfaCRbiXMYATScV5vrUSKctEz7GmrJCgTPJPjmL0M2LHzRSo4rQa6AMZpegRX35W lv9dPJazq6uQShMI3sJ7cGVzJIkcvai6NVXT1xU5mZ3mMNXf5kR1TwbjhBDHpjEfXIyl jTqiGAeOu79PqMoA1IKoOtUHCsZf21Wk13CNibClBJCJaKBCw4zztFbgcp0OiApt/q8O cOfQ== X-Gm-Message-State: AOUpUlEkMH5bICUXNu4XP7z8/SUvbQMJx6g3a96VRhg/0+idLGi9wGsq dR/xZ/uaOXxyBKuaqtvyNaaQlw== X-Google-Smtp-Source: AAOMgpeeh17JHQh+xn4AGSpPCKxCACFpQlSRyUWcXhSQ3zvCwNyhf1fs+/tqXKiN/COPlHzgJiNUYw== X-Received: by 2002:a62:5047:: with SMTP id e68-v6mr24193364pfb.157.1532557744708; Wed, 25 Jul 2018 15:29:04 -0700 (PDT) Received: from swboyd.mtv.corp.google.com ([2620:0:1000:1511:d30e:62c6:f82c:ff40]) by smtp.gmail.com with ESMTPSA id o21-v6sm23839234pfa.54.2018.07.25.15.29.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 25 Jul 2018 15:29:04 -0700 (PDT) From: Stephen Boyd To: Linus Walleij Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-msm@vger.kernel.org, Bjorn Andersson , Doug Anderson Subject: [PATCH v2 2/3] pinctrl: msm: Mux out gpio function with gpio_request() Date: Wed, 25 Jul 2018 15:28:59 -0700 Message-Id: <20180725222900.33231-3-swboyd@chromium.org> X-Mailer: git-send-email 2.18.0.233.g985f88cf7e-goog In-Reply-To: <20180725222900.33231-1-swboyd@chromium.org> References: <20180725222900.33231-1-swboyd@chromium.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We rely on devices to use pinmuxing configurations in DT to select the GPIO function (function 0) if they're going to use the gpio in GPIO mode. Let's simplify things for driver authors by implementing gpio_request_enable() for this pinctrl driver to mux out the GPIO function when the gpio is use from gpiolib. Cc: Bjorn Andersson Cc: Doug Anderson Signed-off-by: Stephen Boyd --- Changes from v1: * None drivers/pinctrl/qcom/pinctrl-msm.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 3970dc599092..1d7367149268 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -176,11 +176,27 @@ static int msm_pinmux_set_mux(struct pinctrl_dev *pctldev, return 0; } +static int msm_pinmux_request_gpio(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned offset) +{ + struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + const struct msm_pingroup *g = &pctrl->soc->groups[offset]; + + /* No funcs? Probably ACPI so can't do anything here */ + if (!g->nfuncs) + return 0; + + /* For now assume function 0 is GPIO because it always is */ + return msm_pinmux_set_mux(pctldev, 0, offset); +} + static const struct pinmux_ops msm_pinmux_ops = { .request = msm_pinmux_request, .get_functions_count = msm_get_functions_count, .get_function_name = msm_get_function_name, .get_function_groups = msm_get_function_groups, + .gpio_request_enable = msm_pinmux_request_gpio, .set_mux = msm_pinmux_set_mux, };