| Message ID | 20180928143106.28417-1-jcrouse@codeaurora.org (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Delegated to: | Andy Gross |
| Headers | show |
| Series | drm/msm/a6xx: Vote for a reasonable bus quota before starting GMU init | expand |
Hi Jordan,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robclark/msm-next]
[also build test ERROR on v4.19-rc5 next-20180928]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Jordan-Crouse/drm-msm-a6xx-Vote-for-a-reasonable-bus-quota-before-starting-GMU-init/20180928-223510
base: git://people.freedesktop.org/~robclark/linux msm-next
config: arm-allmodconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=arm
All error/warnings (new ones prefixed by >>):
drivers/gpu//drm/msm/adreno/a6xx_gmu.c: In function 'a6xx_gmu_resume':
>> drivers/gpu//drm/msm/adreno/a6xx_gmu.c:658:2: error: implicit declaration of function 'icc_set' [-Werror=implicit-function-declaration]
icc_set(gpu->icc_path, 0, 3072000000);
^~~~~~~
>> drivers/gpu//drm/msm/adreno/a6xx_gmu.c:658:13: error: 'struct msm_gpu' has no member named 'icc_path'
icc_set(gpu->icc_path, 0, 3072000000);
^~
>> drivers/gpu//drm/msm/adreno/a6xx_gmu.c:658:2: warning: this decimal constant is unsigned only in ISO C90
icc_set(gpu->icc_path, 0, 3072000000);
^~~~~~~
drivers/gpu//drm/msm/adreno/a6xx_gmu.c: In function 'a6xx_gmu_stop':
drivers/gpu//drm/msm/adreno/a6xx_gmu.c:749:13: error: 'struct msm_gpu' has no member named 'icc_path'
icc_set(gpu->icc_path, 0, 0);
^~
cc1: some warnings being treated as errors
vim +/icc_set +658 drivers/gpu//drm/msm/adreno/a6xx_gmu.c
637
638 int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu)
639 {
640 struct adreno_gpu *adreno_gpu = &a6xx_gpu->base;
641 struct msm_gpu *gpu = &adreno_gpu->base;
642 struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
643 int status, ret;
644
645 if (WARN(!gmu->mmio, "The GMU is not set up yet\n"))
646 return 0;
647
648 /* Turn on the resources */
649 pm_runtime_get_sync(gmu->dev);
650
651 /* Use a known rate to bring up the GMU */
652 clk_set_rate(gmu->core_clk, 200000000);
653 ret = clk_bulk_prepare_enable(gmu->nr_clocks, gmu->clocks);
654 if (ret)
655 goto out;
656
657 /* Set the bus quota to a reasonable value for boot */
> 658 icc_set(gpu->icc_path, 0, 3072000000);
659
660 a6xx_gmu_irq_enable(gmu);
661
662 /* Check to see if we are doing a cold or warm boot */
663 status = gmu_read(gmu, REG_A6XX_GMU_GENERAL_7) == 1 ?
664 GMU_WARM_BOOT : GMU_COLD_BOOT;
665
666 ret = a6xx_gmu_fw_start(gmu, status);
667 if (ret)
668 goto out;
669
670 ret = a6xx_hfi_start(gmu, status);
671
672 /* Set the GPU to the highest power frequency */
673 a6xx_gmu_set_freq(gmu, gmu->nr_gpu_freqs - 1);
674
675 out:
676 /* Make sure to turn off the boot OOB request on error */
677 if (ret)
678 a6xx_gmu_clear_oob(gmu, GMU_OOB_BOOT_SLUMBER);
679
680 return ret;
681 }
682
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index bce66ed9638d..9ddf64ff968e 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -692,6 +692,8 @@ int a6xx_gmu_reset(struct a6xx_gpu *a6xx_gpu) int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu) { + struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; + struct msm_gpu *gpu = &adreno_gpu->base; struct a6xx_gmu *gmu = &a6xx_gpu->gmu; int status, ret; @@ -707,6 +709,9 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu) if (ret) goto out; + /* Set the bus quota to a reasonable value for boot */ + icc_set(gpu->icc_path, 0, 3072000000); + a6xx_gmu_irq_enable(gmu); /* Check to see if we are doing a cold or warm boot */ @@ -747,6 +752,8 @@ bool a6xx_gmu_isidle(struct a6xx_gmu *gmu) int a6xx_gmu_stop(struct a6xx_gpu *a6xx_gpu) { + struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; + struct msm_gpu *gpu = &adreno_gpu->base; struct a6xx_gmu *gmu = &a6xx_gpu->gmu; u32 val; @@ -793,6 +800,9 @@ int a6xx_gmu_stop(struct a6xx_gpu *a6xx_gpu) /* Tell RPMh to power off the GPU */ a6xx_rpmh_stop(gmu); + /* Remove the bus vote */ + icc_set(gpu->icc_path, 0, 0); + clk_bulk_disable_unprepare(gmu->nr_clocks, gmu->clocks); pm_runtime_put_sync(gmu->dev);
To avoid possible issues during GMU init make sure to vote the bus quota to a reasonable level before starting the sequence. Also remove the bus vote during power off to avoid leaking power we don't need. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 10 ++++++++++ 1 file changed, 10 insertions(+)