From patchwork Fri Sep 28 14:31:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10620069 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 19C16913 for ; Fri, 28 Sep 2018 14:31:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 09CF12B881 for ; Fri, 28 Sep 2018 14:31:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F09162B87F; Fri, 28 Sep 2018 14:31:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 997B02B87F for ; Fri, 28 Sep 2018 14:31:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729196AbeI1UzO (ORCPT ); Fri, 28 Sep 2018 16:55:14 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:59044 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726971AbeI1UzN (ORCPT ); Fri, 28 Sep 2018 16:55:13 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 84E8960274; Fri, 28 Sep 2018 14:31:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1538145070; bh=Eax8kuenEbO2drhj+R5tOxoFujroIajjBbsQd6XYA/A=; h=From:To:Cc:Subject:Date:From; b=Ktr+NKK6hj/3TljZ2yHzkThRlfsmZ2iXJTVTQgTcEAA7nlBbSl+y/dWZwqBXsgXpn +e1HOkb2z2qcYJOT9OBEpq2u5FV9jIbCI6/z8wSbGLepHaRDy8iRDFVlHOjLOzlSWF BkFo3oYREWAs4dd1QGjKnuJ15mhAYPcGIqEP/wz8= Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id C4549600C1; Fri, 28 Sep 2018 14:31:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1538145070; bh=Eax8kuenEbO2drhj+R5tOxoFujroIajjBbsQd6XYA/A=; h=From:To:Cc:Subject:Date:From; b=Ktr+NKK6hj/3TljZ2yHzkThRlfsmZ2iXJTVTQgTcEAA7nlBbSl+y/dWZwqBXsgXpn +e1HOkb2z2qcYJOT9OBEpq2u5FV9jIbCI6/z8wSbGLepHaRDy8iRDFVlHOjLOzlSWF BkFo3oYREWAs4dd1QGjKnuJ15mhAYPcGIqEP/wz8= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org C4549600C1 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Subject: [PATCH] drm/msm/a6xx: Vote for a reasonable bus quota before starting GMU init Date: Fri, 28 Sep 2018 08:31:06 -0600 Message-Id: <20180928143106.28417-1-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.18.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To avoid possible issues during GMU init make sure to vote the bus quota to a reasonable level before starting the sequence. Also remove the bus vote during power off to avoid leaking power we don't need. Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index bce66ed9638d..9ddf64ff968e 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -692,6 +692,8 @@ int a6xx_gmu_reset(struct a6xx_gpu *a6xx_gpu) int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu) { + struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; + struct msm_gpu *gpu = &adreno_gpu->base; struct a6xx_gmu *gmu = &a6xx_gpu->gmu; int status, ret; @@ -707,6 +709,9 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu) if (ret) goto out; + /* Set the bus quota to a reasonable value for boot */ + icc_set(gpu->icc_path, 0, 3072000000); + a6xx_gmu_irq_enable(gmu); /* Check to see if we are doing a cold or warm boot */ @@ -747,6 +752,8 @@ bool a6xx_gmu_isidle(struct a6xx_gmu *gmu) int a6xx_gmu_stop(struct a6xx_gpu *a6xx_gpu) { + struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; + struct msm_gpu *gpu = &adreno_gpu->base; struct a6xx_gmu *gmu = &a6xx_gpu->gmu; u32 val; @@ -793,6 +800,9 @@ int a6xx_gmu_stop(struct a6xx_gpu *a6xx_gpu) /* Tell RPMh to power off the GPU */ a6xx_rpmh_stop(gmu); + /* Remove the bus vote */ + icc_set(gpu->icc_path, 0, 0); + clk_bulk_disable_unprepare(gmu->nr_clocks, gmu->clocks); pm_runtime_put_sync(gmu->dev);