From patchwork Mon Oct 8 20:17:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 10631389 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0D88415E8 for ; Mon, 8 Oct 2018 20:17:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E97E928723 for ; Mon, 8 Oct 2018 20:17:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DB2602875C; Mon, 8 Oct 2018 20:17:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6B4D428723 for ; Mon, 8 Oct 2018 20:17:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726613AbeJIDbA (ORCPT ); Mon, 8 Oct 2018 23:31:00 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:46017 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726663AbeJIDbA (ORCPT ); Mon, 8 Oct 2018 23:31:00 -0400 Received: by mail-pf1-f193.google.com with SMTP id u12-v6so5739568pfn.12 for ; Mon, 08 Oct 2018 13:17:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=ONgysF60ZUNcVrGkyXF+8eIAF7brYjaHt32SnVKA+nE=; b=bZmns2wzJFqSKXb4aB2Ygp3fycg/tvvaPaumHtOXQpkWpoNDu31hxfZLPOg18NTkMV Zuv+wT4PufE2mChGMlkAYp3vWew4rnc4g8EtRlnyl4hrAfxMcWpQUeMbOoHq9cECDLU9 wIgbE1VUgkH3/LxCiz7gkQo9tZB71YdNKFcpU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=ONgysF60ZUNcVrGkyXF+8eIAF7brYjaHt32SnVKA+nE=; b=NaYp2f66OWbOr2On5YsaIjxeLi/oq/3tCmjZPcelz35aoess+x3M44+6QUe1xwIF1o 3fQITOahr77m+aybhKPUOxpV8mwKViHSCVTa9XskgkoXGf1KezXDvIZ+6c9AvZAMVfYL OPdkUQIJsADfKKxMqwe7SsTvyfBWA7qxM/5wXfXmlX/zuzKlYGB4YrT5W67yj19earem vI/t3m/zXsbZpm4JCitwQAMIgHBotcWN6m7c0ofFTLGRNo02ay95sfunJ9C8cIwWPoKA T/66F8gmpR7NqOb7cHPGC7QIHhc1bomXUJqo7luVWrbLo7cqJiAfyMtsT3rLgS8r0j2W vJwQ== X-Gm-Message-State: ABuFfohKcw9BjxQ3hOlPD3dpmNjZs6VclfsYXXT2xCPVuIbV06rCOzlT /mLzEHuP2dNjGqhYZxUccylraA== X-Google-Smtp-Source: ACcGV63NbPpEuWIt0mj6I8XWkaaXYEX1dPRZvL1k4pXhE+v/VJ27lHCMYu7x4doh6sLqJdo/w1ji8w== X-Received: by 2002:a63:88c1:: with SMTP id l184-v6mr12843370pgd.431.1539029851096; Mon, 08 Oct 2018 13:17:31 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:c8e0:70d7:4be7:a36]) by smtp.gmail.com with ESMTPSA id n13-v6sm20266001pgr.73.2018.10.08.13.17.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 08 Oct 2018 13:17:30 -0700 (PDT) From: Douglas Anderson To: Andy Gross Cc: Ryan Case , linux-arm-msm@vger.kernel.org, Girish Mahadevan , Stephen Boyd , Douglas Anderson , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , David Brown , Mark Rutland , linux-soc@vger.kernel.org Subject: [PATCH v2] arm64: dts: qcom: sdm845: Add qspi (quad SPI) node Date: Mon, 8 Oct 2018 13:17:11 -0700 Message-Id: <20181008201711.152038-1-dianders@chromium.org> X-Mailer: git-send-email 2.19.0.605.g01d371f741-goog MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds the Quad SPI controller to the main sdm845 device tree file. Boards will be expected to assign the proper pinctrl depending on how many chip selects they have hooked up and how many data lines. This depends on commit 48735597f7bd ("clk: qcom: Add qspi (Quad SPI) clock defines for sdm845 to header") to add the needed defines. It also shouldn't land until the patch ("dt-bindings: spi: Qualcomm Quad SPI(QSPI) documentation") [1] lands. [1] https://lkml.kernel.org/r/20181002214709.162330-1-ryandcase@chromium.org Signed-off-by: Douglas Anderson Reviewed-by: Stephen Boyd --- Changes in v2: - Node is named "spi" not "qspi" arch/arm64/boot/dts/qcom/sdm845.dtsi | 47 ++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index b72bdb0a31a5..97946f46f7f3 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -822,6 +822,41 @@ interrupt-controller; #interrupt-cells = <2>; + qspi_clk: qspi-clk { + pinmux { + pins = "gpio95"; + function = "qspi_clk"; + }; + }; + + qspi_cs0: qspi-cs0 { + pinmux { + pins = "gpio90"; + function = "qspi_cs"; + }; + }; + + qspi_cs1: qspi-cs1 { + pinmux { + pins = "gpio89"; + function = "qspi_cs"; + }; + }; + + qspi_data01: qspi-data01 { + pinmux-data { + pins = "gpio91", "gpio92"; + function = "qspi_data"; + }; + }; + + qspi_data12: qspi-data12 { + pinmux-data { + pins = "gpio93", "gpio94"; + function = "qspi_data"; + }; + }; + qup_i2c0_default: qup-i2c0-default { pinmux { pins = "gpio0", "gpio1"; @@ -1070,6 +1105,18 @@ }; }; + qspi: spi@88df000 { + compatible = "qcom,sdm845-qspi", "qcom,qspi-v1"; + reg = <0x88df000 0x600>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>, + <&gcc GCC_QSPI_CORE_CLK>; + clock-names = "iface", "core"; + status = "disabled"; + }; + usb_1_hsphy: phy@88e2000 { compatible = "qcom,sdm845-qusb2-phy"; reg = <0x88e2000 0x400>;