From patchwork Wed Oct 17 16:28:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10645859 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 96F7F13B0 for ; Wed, 17 Oct 2018 16:28:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8843928421 for ; Wed, 17 Oct 2018 16:28:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7CDCF28481; Wed, 17 Oct 2018 16:28:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2762E28421 for ; Wed, 17 Oct 2018 16:28:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727290AbeJRAYy (ORCPT ); Wed, 17 Oct 2018 20:24:54 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:49232 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727095AbeJRAYx (ORCPT ); Wed, 17 Oct 2018 20:24:53 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 7E80961322; Wed, 17 Oct 2018 16:28:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1539793705; bh=xcX54/g3EdII1YIl/eNRiAGyX+WaONb4qfaXge+endc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pEeTNDU9BAy+6TGfs2C6YKwcoatZGKx/sjCpcnGwzIElQ4AK5/EM5TjpNguHNZeSL ynwLVn6bvZNQZPEAfly+SSKM7XH/M9JypUBjbmpqvUqIm0j8OSmNWQIQgCF2r0Grts +NPwCJR7inosaRqkOedy7gcRc+yHJouAbflaTo8o= Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id AAA63612EE; Wed, 17 Oct 2018 16:28:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1539793705; bh=xcX54/g3EdII1YIl/eNRiAGyX+WaONb4qfaXge+endc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pEeTNDU9BAy+6TGfs2C6YKwcoatZGKx/sjCpcnGwzIElQ4AK5/EM5TjpNguHNZeSL ynwLVn6bvZNQZPEAfly+SSKM7XH/M9JypUBjbmpqvUqIm0j8OSmNWQIQgCF2r0Grts +NPwCJR7inosaRqkOedy7gcRc+yHJouAbflaTo8o= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org AAA63612EE Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH 05/11] drm/msm/gpu: Move gpu_poll_timeout() to adreno_gpu.h Date: Wed, 17 Oct 2018 10:28:12 -0600 Message-Id: <20181017162818.8498-6-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181017162818.8498-1-jcrouse@codeaurora.org> References: <20181017162818.8498-1-jcrouse@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The gpu_poll_timeout() function can be useful to multiple targets so mvoe it into adreno_gpu.h from the a5xx code. Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 5 ----- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 6 ++++++ 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index 48b5304f460c..2f21a559b15c 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include "msm_gem.h" #include "msm_mmu.h" @@ -1211,10 +1210,6 @@ struct a5xx_gpu_state { u32 *hlsqregs; }; -#define gpu_poll_timeout(gpu, addr, val, cond, interval, timeout) \ - readl_poll_timeout((gpu)->mmio + ((addr) << 2), val, cond, \ - interval, timeout) - static int a5xx_crashdumper_init(struct msm_gpu *gpu, struct a5xx_crashdumper *dumper) { diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h index de6e6ee42fba..7e5f1120ce7a 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -21,6 +21,7 @@ #define __ADRENO_GPU_H__ #include +#include #include "msm_gpu.h" @@ -375,4 +376,9 @@ static inline uint32_t get_wptr(struct msm_ringbuffer *ring) ((1 << 29) \ ((ilog2((_len)) & 0x1F) << 24) | (((_reg) << 2) & 0xFFFFF)) + +#define gpu_poll_timeout(gpu, addr, val, cond, interval, timeout) \ + readl_poll_timeout((gpu)->mmio + ((addr) << 2), val, cond, \ + interval, timeout) + #endif /* __ADRENO_GPU_H__ */