From patchwork Wed Oct 24 17:27:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Green X-Patchwork-Id: 10654819 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A347814BB for ; Wed, 24 Oct 2018 17:28:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D51F22AA6A for ; Wed, 24 Oct 2018 17:28:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C88FC2AA6C; Wed, 24 Oct 2018 17:28:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 696AF2AA6A for ; Wed, 24 Oct 2018 17:28:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727046AbeJYB5S (ORCPT ); Wed, 24 Oct 2018 21:57:18 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:42334 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727020AbeJYB5S (ORCPT ); Wed, 24 Oct 2018 21:57:18 -0400 Received: by mail-pf1-f193.google.com with SMTP id f26-v6so2752324pfn.9 for ; Wed, 24 Oct 2018 10:28:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1YMXXvnPT80nLN/AeRFvYKT6u9kQcvBBEAiIyCdBvqI=; b=Lq0Ahtipr6t/85CWRjyUFcqKyaKN4r7LDsXNByrYsTIqZjSjNWkTnhGO9SVr/YXXB4 eb3kb4SQYvA7VzINBN15czFZeS3TZhzZxkgnYjJplmfRbHE0xgFqADcFp1B9uyELyuS4 s/2v7LHXQKhRPSM2ICZO3pxBj6AqtYQUVMcT4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1YMXXvnPT80nLN/AeRFvYKT6u9kQcvBBEAiIyCdBvqI=; b=q65Mty2N3hxH7/a2LCJLfGJKSt38dQf8t6pcrFkJZDDpc0MPp0Z8jvlIkSfo2h6meZ duRt222htCFEFGrgjVyvbb+TV//Exd3TH2FLMhwr+LcDiKwCjfHAlWaqeNJ9svhZkgCL jH9z/2G5Z1rHXEMj5/X35N78b0Uzjd/rnI4eexICkm/0IrxytVithDyUnE1tVVtitjPB 4w7G+p5sgqjhzXxcsiTJTtxyAVaiaOollzR/7N3cqiki1hl2xANjdVihkes2ol4OGYRc 5rOZnx4RkYR8PjmA3uUh7Ms/06yQUlRxCzG+GWTfFMkD3LziNHNrJHndCEiR2h1p/n4c Ef2A== X-Gm-Message-State: AGRZ1gIzRjJK0kMhY3VYCEsXmOivlP4NCgPzu2YiJGf3p4l2R/Y8Miti oP+DIjQi3wnCNSf97TmghgnYCw== X-Google-Smtp-Source: AJdET5eE/x93izDsYzVpAIqkPew9unLYHGs1U7wWg3NxyYVlNDzxXjUQYyx3TKO8LBGFKrRs6jHliQ== X-Received: by 2002:a63:c0f:: with SMTP id b15-v6mr3423345pgl.400.1540402103844; Wed, 24 Oct 2018 10:28:23 -0700 (PDT) Received: from evgreen2.mtv.corp.google.com ([2620:15c:202:201:e418:c825:76cf:5f64]) by smtp.gmail.com with ESMTPSA id v185-v6sm5674265pfv.48.2018.10.24.10.28.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 24 Oct 2018 10:28:22 -0700 (PDT) From: Evan Green To: Rob Herring , Andy Gross , Kishon Vijay Abraham I Cc: Douglas Anderson , Stephen Boyd , Evan Green , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , David Brown , Mark Rutland , linux-soc@vger.kernel.org Subject: [PATCH v4 3/5] arm64: dts: qcom: sdm845: add UFS controller Date: Wed, 24 Oct 2018 10:27:33 -0700 Message-Id: <20181024172735.154304-4-evgreen@chromium.org> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20181024172735.154304-1-evgreen@chromium.org> References: <20181024172735.154304-1-evgreen@chromium.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the UFS controller and PHY to SDM845. Signed-off-by: Evan Green Signed-off-by: Douglas Anderson --- As Doug mentioned in v2, this should land after (or with) the driver fix in this series. Changes in v4: None Changes in v3: None Changes in v2: - Renamed ufsphy to phy (Vivek) - Removed #clock-cells (Vivek) arch/arm64/boot/dts/qcom/sdm845.dtsi | 67 ++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index b72bdb0a31a5..9c72edb678ec 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -808,6 +808,73 @@ }; }; + ufshc1: ufshc@1d84000 { + compatible = "qcom,sdm845-ufshc", "qcom,ufshc", + "jedec,ufs-2.0"; + reg = <0x1d84000 0x2500>; + interrupts = ; + phys = <&ufsphy1_lanes>; + phy-names = "ufsphy"; + lanes-per-direction = <2>; + power-domains = <&gcc UFS_PHY_GDSC>; + + clock-names = + "core_clk", + "bus_aggr_clk", + "iface_clk", + "core_clk_unipro", + "ref_clk", + "tx_lane0_sync_clk", + "rx_lane0_sync_clk", + "rx_lane1_sync_clk"; + clocks = + <&gcc GCC_UFS_PHY_AXI_CLK>, + <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, + <&gcc GCC_UFS_PHY_AHB_CLK>, + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; + freq-table-hz = + <50000000 200000000>, + <0 0>, + <0 0>, + <37500000 150000000>, + <0 0>, + <0 0>, + <0 0>, + <0 0>; + + resets = <&gcc GCC_UFS_PHY_BCR>; + reset-names = "rst"; + + status = "disabled"; + }; + + ufsphy1: phy@1d87000 { + compatible = "qcom,sdm845-qmp-ufs-phy"; + reg = <0x1d87000 0x18c>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clock-names = "ref", + "ref_aux"; + clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + + status = "disabled"; + + ufsphy1_lanes: lanes@1d87400 { + reg = <0x1d87400 0x108>, + <0x1d87600 0x1e0>, + <0x1d87c00 0x1dc>, + <0x1d87800 0x108>, + <0x1d87a00 0x1e0>; + #phy-cells = <0>; + }; + }; + tcsr_mutex_regs: syscon@1f40000 { compatible = "syscon"; reg = <0x1f40000 0x40000>;