From patchwork Fri Nov 9 09:44:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 10675609 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3FBB414E2 for ; Fri, 9 Nov 2018 09:46:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2EE0C2E544 for ; Fri, 9 Nov 2018 09:46:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2341F2E559; Fri, 9 Nov 2018 09:46:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B92932E544 for ; Fri, 9 Nov 2018 09:46:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728155AbeKITZB (ORCPT ); Fri, 9 Nov 2018 14:25:01 -0500 Received: from mail.kernel.org ([198.145.29.99]:53602 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727560AbeKITZA (ORCPT ); Fri, 9 Nov 2018 14:25:00 -0500 Received: from localhost.localdomain (unknown [171.76.98.79]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2E245208A3; Fri, 9 Nov 2018 09:45:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1541756713; bh=Xfah7lNUY4GKlFzBU/D4vJ/V6hUeNKbtDaye/+xy+ww=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=0RNwe4QeKr+KXlna8eIgI6urut5p8Fn6WinlJX1v5Q1ztemZ4LnFrKWV9CMJdF/Xp 08f2VC5MPTIObyAr2r0ceDcBOW5M9OzAykve2isykRtRDQoVInKCqKzulmSBVdqPKs JQ2CDzwrqISWpmOdWflajoFwmXgraANbvyrFMDqk= From: Vinod Koul To: Andy Gross Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Bjorn Andersson , Vinod Koul Subject: [PATCH v5 08/18] arm64: dts: qcom: qcs404: Add sdcc1 node Date: Fri, 9 Nov 2018 15:14:07 +0530 Message-Id: <20181109094417.12109-9-vkoul@kernel.org> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20181109094417.12109-1-vkoul@kernel.org> References: <20181109094417.12109-1-vkoul@kernel.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Bjorn Andersson Add the sdcc1 node and enable it for the QCS404-EVB. Signed-off-by: Bjorn Andersson Signed-off-by: Vinod Koul --- arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 64 ++++++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/qcs404.dtsi | 17 +++++++++ 2 files changed, 81 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi index d1ba8b8ece46..358d6d5f7d85 100644 --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi @@ -109,3 +109,67 @@ }; }; }; + +&sdcc1 { + status = "ok"; + + mmc-ddr-1_8v; + bus-width = <8>; + non-removable; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc1_on>; + pinctrl-1 = <&sdc1_off>; +}; + +&tlmm { + sdc1_on: sdc1-on { + clk { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <16>; + }; + + cmd { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <10>; + }; + + data { + pins = "sdc1_data"; + bias-pull-up; + dreive-strength = <10>; + }; + + rclk { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; + + sdc1_off: sdc1-off { + clk { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <2>; + }; + + cmd { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <2>; + }; + + data { + pins = "sdc1_data"; + bias-pull-up; + dreive-strength = <2>; + }; + + rclk { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index d32b91480dc1..1b3e21c1fed9 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -181,6 +181,23 @@ reg = <0x01905000 0x20000>; }; + sdcc1: sdcc@7804000 { + compatible = "qcom,sdhci-msm-v5"; + reg = <0x07804000 0x1000>, <0x7805000 0x1000>; + reg-names = "hc_mem", "cmdq_mem"; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC1_APPS_CLK>, + <&gcc GCC_SDCC1_AHB_CLK>, + <&xo_board>; + clock-names = "core", "iface", "xo"; + + status = "disabled"; + }; + blsp1_uart2: serial@78b1000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x078b1000 0x200>;