From patchwork Thu Dec 20 01:01:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 10738419 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 35D5E746 for ; Thu, 20 Dec 2018 01:02:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1E1922851B for ; Thu, 20 Dec 2018 01:02:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 10F45285F0; Thu, 20 Dec 2018 01:02:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 99860285EB for ; Thu, 20 Dec 2018 01:02:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730627AbeLTBCi (ORCPT ); Wed, 19 Dec 2018 20:02:38 -0500 Received: from mail-pg1-f196.google.com ([209.85.215.196]:38299 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728040AbeLTBCh (ORCPT ); Wed, 19 Dec 2018 20:02:37 -0500 Received: by mail-pg1-f196.google.com with SMTP id g189so27488pgc.5 for ; Wed, 19 Dec 2018 17:02:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=x5i7/5XJL064OccNs2o8bb+FMlNTe/XBc/lkskb4qJo=; b=ZE6BEwFJNzKzy0QftiWinKLCCeAAwjbODMVzIBCaoR0sq1+cT5YzLPxTcVamZyxC3x sGe8Ao8A5lM9zg0bUXLxas8Wqb9BfTmLn3UZ4jXVp64k6X/EsoETdS81mKGJ5Mbv6hhX QwuMOmSjZum7XgIVABXw3teFjA39cnpszRUIE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=x5i7/5XJL064OccNs2o8bb+FMlNTe/XBc/lkskb4qJo=; b=m0ci2znJDL8DOfNiGN9yk4yJ5rMY1GFkhBVeZYmv+LKzL7QaRHS6apeILqWZk+qBWG 4Themu8Uyb/10AJaxaXEl20TV0DGIdo4VA36XlddDN3sPkQxub1rIYMv4JYTqiDv4vSh Jx8L3XRSWel7F3bELS7nnqk8iHfLNlP7aDIuI0B34b7UeDaYGVvUJnMRdd+WR2YSnCB/ 5Dn1Gz597B10hX8wQsec4SjBNPIiKAfCl5ODERWjG0J6sB+KbRCNpA7Ckzj4KzFtxJtI rsxWbeVIb0fGnfoLDYa7pfptIRrxZIH7izruAtiAjBcUcJixCz/LpTs8+nLUVoFz3OKV BcVw== X-Gm-Message-State: AA+aEWafboRrOdV8VzEJcwFAr581fP93CrGFTjkUcJgDfw5h3FyvhjVi GoUWXwzkzj5CNTK2MlO5+bWD9g== X-Google-Smtp-Source: AFSGD/WpvQFFNbj83n2PNngT90t09hB7EthY0uwD+TLzHT5xtLY17d5ga7DcMCnGsiEaclIEhrSn9A== X-Received: by 2002:a63:4c04:: with SMTP id z4mr21706775pga.312.1545267756891; Wed, 19 Dec 2018 17:02:36 -0800 (PST) Received: from localhost.localdomain (61-216-91-114.HINET-IP.hinet.net. [61.216.91.114]) by smtp.gmail.com with ESMTPSA id e16sm25334392pfn.46.2018.12.19.17.02.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 19 Dec 2018 17:02:35 -0800 (PST) From: Shawn Guo To: Kishon Vijay Abraham I Cc: Rob Herring , Sriharsha Allenki , Anu Ramanathan , Bjorn Andersson , Vinod Koul , Jack Pham , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Shawn Guo Subject: [PATCH v6 1/2] dt-bindings: phy: Add Qualcomm Synopsys High-Speed USB PHY binding Date: Thu, 20 Dec 2018 09:01:11 +0800 Message-Id: <20181220010112.16824-2-shawn.guo@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181220010112.16824-1-shawn.guo@linaro.org> References: <20181220010112.16824-1-shawn.guo@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sriharsha Allenki It adds bindings for Synopsys 28nm femto phy controller that supports LS/FS/HS usb connectivity on Qualcomm chipsets. Signed-off-by: Sriharsha Allenki Signed-off-by: Anu Ramanathan Signed-off-by: Bjorn Andersson Reviewed-by: Rob Herring Signed-off-by: Shawn Guo --- .../phy/qcom,snps-28nm-usb-hs-phy.txt | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/qcom,snps-28nm-usb-hs-phy.txt diff --git a/Documentation/devicetree/bindings/phy/qcom,snps-28nm-usb-hs-phy.txt b/Documentation/devicetree/bindings/phy/qcom,snps-28nm-usb-hs-phy.txt new file mode 100644 index 000000000000..301987e716fd --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,snps-28nm-usb-hs-phy.txt @@ -0,0 +1,87 @@ +Qualcomm Synopsys 28nm Femto phy controller +=========================================== + +Synopsys 28nm femto phy controller supports LS/FS/HS usb connectivity on +Qualcomm chipsets. + +Required properties: + +- compatible: + Value type: + Definition: Should contain "qcom,qcs404-usb-hsphy". + +- reg: + Value type: + Definition: USB PHY base address and length of the register map. + +- #phy-cells: + Value type: + Definition: Should be 0. See phy/phy-bindings.txt for details. + +- clocks: + Value type: + Definition: See clock-bindings.txt section "consumers". List of + three clock specifiers for reference, phy core and + sleep clocks. + +- clock-names: + Value type: + Definition: Names of the clocks in 1-1 correspondence with the "clocks" + property. Must contain "ref", "phy" and "sleep". + +- resets: + Value type: + Definition: See reset.txt section "consumers". PHY reset specifiers + for phy core and POR resets. + +- reset-names: + Value type: + Definition: Names of the resets in 1-1 correspondence with the "resets" + property. Must contain "phy" and "por". + +- vdd-supply: + Value type: + Definition: phandle to the regulator VDD supply node. + +- vdda1p8-supply: + Value type: + Definition: phandle to the regulator 1.8V supply node. + +- vdda3p3-supply: + Value type: + Definition: phandle to the regulator 3.3V supply node. + +- qcom,vdd-voltage-level: + Value type: + Definition: This is a list of three integer values where + each value corresponding to voltage corner in uV. + +Optional child nodes: + +- The link to the USB connector should be modeled using the OF graph bindings + specified in bindings/graph.txt. + +Example: + + phy@7a000 { + compatible = "qcom,qcs404-usb-hsphy"; + reg = <0x7a000 0x200>; + #phy-cells = <0>; + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "phy", "sleep"; + resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>, + <&gcc GCC_USB2A_PHY_BCR>; + reset-names = "phy", "por"; + vdd-supply = <&vreg_l4_1p2>; + vdda1p8-supply = <&vreg_l5_1p8>; + vdda3p3-supply = <&vreg_l12_3p3>; + qcom,vdd-voltage-level = <0 1144000 1200000>; + + port { + ep_usb_phy: endpoint { + remote-endpoint = <&ep_usb_con>; + }; + }; + };