From patchwork Fri Jan 11 22:27:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 10760759 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5615517D2 for ; Fri, 11 Jan 2019 22:28:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 406D52A027 for ; Fri, 11 Jan 2019 22:28:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 32A062A04D; Fri, 11 Jan 2019 22:28:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C6A5D2A027 for ; Fri, 11 Jan 2019 22:28:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726260AbfAKW2E (ORCPT ); Fri, 11 Jan 2019 17:28:04 -0500 Received: from mail-pg1-f195.google.com ([209.85.215.195]:36723 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725767AbfAKW2E (ORCPT ); Fri, 11 Jan 2019 17:28:04 -0500 Received: by mail-pg1-f195.google.com with SMTP id n2so6883293pgm.3 for ; Fri, 11 Jan 2019 14:28:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=bFo0pbqsh0Dvh5rNBGhBWDBhm/iPdshZj7ccQgr+vtQ=; b=AqRwU0ZisWmvHZrIYus5ZptOMtgKTuGtzX2PK5ZonT5hxjvJZ69inV8++4fwiSBTYM La7KgHuadmhngQMXkw8MD18ePbULQeiT6717E++j2g/bCjtwsr+CphyphvkL9A3lCfbh 8++h2yRlAf46/IIfBU3+c/PmebkJM2/mLdVZg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=bFo0pbqsh0Dvh5rNBGhBWDBhm/iPdshZj7ccQgr+vtQ=; b=PitD0OR/gjGu/yvlq0HaD4S7pWX+IGCJi4shlKkw/4r/GUu7qiiM+hqHT4fXlUR0sA yYKT8dmJE0kN+8kH/Gxcbr4IfGmX/ryV2nUSnBZnItem2Fy2ilUffi6ZlefOWysV2vqm rp+7uFj6292SvtQ6EJANye6VB0Nq76ndRbvHr2u0BkeABoDCTD/O1bSdRTAXeDwUZgXj g4VJUSoxNpyWonKpraaiMmgfX9WMvQ53xu1Db/AeKrWyuqAOElCdYCUvEe/Qn5JZTLuT WHXtqrsMP/TErWuGgAWT40LvazJJ3sNV0xaJRNC+qvraYp2axGpnnY5+52/WGrXQQgpx YlbQ== X-Gm-Message-State: AJcUukeGDv0K2OmER41018BDf21gxyUkIfQKwZAov4NaHYvmX6Pj6GB3 f52aEIb62jlUxu5zVF98LrnYx52OggQ= X-Google-Smtp-Source: ALg8bN6Y95vumKWEwb8PqGLyXo+RNP5N5pOi/Y2DrEDcSTe19V2itjJ0qZ8lPryfmRXM5qRm7gEv9A== X-Received: by 2002:a62:62c5:: with SMTP id w188mr16471072pfb.160.1547245682936; Fri, 11 Jan 2019 14:28:02 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:c8e0:70d7:4be7:a36]) by smtp.gmail.com with ESMTPSA id x3sm239960227pgt.45.2019.01.11.14.28.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 11 Jan 2019 14:28:02 -0800 (PST) From: Douglas Anderson To: Rob Clark , Jordan Crouse Cc: Bjorn Andersson , Stephen Boyd , Rajendra Nayak , Andy Gross , linux-arm-msm@vger.kernel.org, Viresh Kumar , "Kristian H . Kristensen" , Douglas Anderson , Colin Ian King , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Sharat Masetty , David Airlie , freedreno@lists.freedesktop.org, Mamta Shukla , Daniel Vetter Subject: [PATCH] drm/msm: Fix A6XX support for opp-level Date: Fri, 11 Jan 2019 14:27:21 -0800 Message-Id: <20190111222721.246972-1-dianders@chromium.org> X-Mailer: git-send-email 2.20.1.97.g81188d93c3-goog MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The bindings for Qualcomm opp levels changed after being Acked but before landing. Thus the code in the GPU that was relying on the old bindings is now broken. While we could just change the string 'qcom,level' to the string 'opp-level', it actually seems better to use the newly-introduced dev_pm_opp_get_level(). This patch thus has a hard dependency on the outstanding patch ("OPP: Add support for parsing the 'opp-level' property") and will need to land in a tree that contains that patch. This patch needs to land before the patch ("arm64: dts: sdm845: Add gpu and gmu device nodes") since if a tree contains the device tree patch but not this one you'll get a crash at bootup. Signed-off-by: Douglas Anderson Reviewed-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 5beb83d1cf87..900f18dc1577 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -928,25 +928,20 @@ static int a6xx_gmu_memory_probe(struct a6xx_gmu *gmu) } /* Return the 'arc-level' for the given frequency */ -static u32 a6xx_gmu_get_arc_level(struct device *dev, unsigned long freq) +static unsigned int a6xx_gmu_get_arc_level(struct device *dev, + unsigned long freq) { struct dev_pm_opp *opp; - struct device_node *np; - u32 val = 0; + unsigned int val; if (!freq) return 0; - opp = dev_pm_opp_find_freq_exact(dev, freq, true); + opp = dev_pm_opp_find_freq_exact(dev, freq, true); if (IS_ERR(opp)) return 0; - np = dev_pm_opp_get_of_node(opp); - - if (np) { - of_property_read_u32(np, "qcom,level", &val); - of_node_put(np); - } + val = dev_pm_opp_get_level(opp); dev_pm_opp_put(opp); @@ -982,7 +977,7 @@ static int a6xx_gmu_rpmh_arc_votes_init(struct device *dev, u32 *votes, /* Construct a vote for each frequency */ for (i = 0; i < freqs_count; i++) { u8 pindex = 0, sindex = 0; - u32 level = a6xx_gmu_get_arc_level(dev, freqs[i]); + unsigned int level = a6xx_gmu_get_arc_level(dev, freqs[i]); /* Get the primary index that matches the arc level */ for (j = 0; j < pri_count; j++) {