From patchwork Wed Mar 13 21:18:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 10851809 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A62C71515 for ; Wed, 13 Mar 2019 21:19:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9503A29D45 for ; Wed, 13 Mar 2019 21:19:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8975C29D50; Wed, 13 Mar 2019 21:19:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F195B29D45 for ; Wed, 13 Mar 2019 21:19:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727517AbfCMVTF (ORCPT ); Wed, 13 Mar 2019 17:19:05 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:46344 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727534AbfCMVTE (ORCPT ); Wed, 13 Mar 2019 17:19:04 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id B2F2F60DB3; Wed, 13 Mar 2019 21:19:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1552511943; bh=yrbany7xJkGKfdWOmTNDhj5ACcMHtm/FzzIKSzyMgJo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cWyqNSzAyTkjIRAsaXXLDgw5tkL1E8/ioOCgVWtYvfXk+qgUNcanpYnWDi/VxWADJ 2wz6XovDKv27Oqt0bkAeOery0aHb/qFCYDLTMzpCHPgA882zWIXPFjlPedJ5NiI7pF N9R4kU0nBk9LAZwPuR205/ZTmDf+pTYpzU8QlNIc= Received: from codeaurora.org (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: ilina@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id BB87460312; Wed, 13 Mar 2019 21:18:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1552511939; bh=yrbany7xJkGKfdWOmTNDhj5ACcMHtm/FzzIKSzyMgJo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lZ/UfM1vZQmr199NB739mdT+q7lUUEsOiZA+r7OvnCLEXPfqAmbLX1kawM8rrP5YT alKWUSbs5mwpKnoSFB50JyaWj75QeUAVPtf+2VHbGadFZsNcZa0YpyFHB92zUxllZ4 NIg+Mr68cyP5VKndv3tAAHtHWpPYP3yQXiUqB988= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org BB87460312 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilina@codeaurora.org From: Lina Iyer To: swboyd@chromium.org, evgreen@chromium.org, marc.zyngier@arm.com Cc: linux-kernel@vger.kernel.org, rplsssn@codeaurora.org, linux-arm-msm@vger.kernel.org, thierry.reding@gmail.com, bjorn.andersson@linaro.org, dianders@chromium.org, linus.walleij@linaro.org, Lina Iyer Subject: [PATCH v4 03/10] of/irq: document properties for wakeup interrupt parent Date: Wed, 13 Mar 2019 15:18:37 -0600 Message-Id: <20190313211844.29416-4-ilina@codeaurora.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190313211844.29416-1-ilina@codeaurora.org> References: <20190313211844.29416-1-ilina@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some interrupt controllers in a SoC, are always powered on and have a select interrupts routed to them, so that they can wakeup the SoC from suspend. Add wakeup-parent DT property to refer to these interrupt controllers. If the interrupts routed to the wakeup parent are not sequential, than a map needs to exist to associate the same interrupt line on multiple interrupt controllers. Providing this map in every driver is cumbersome. Let's add this in the device tree and document the properties to map the interrupt specifiers Signed-off-by: Lina Iyer --- Changes in v4: - Added this documentation --- .../interrupt-controller/interrupts.txt | 39 +++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt b/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt index 8a3c40829899..917b598317f5 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt @@ -108,3 +108,42 @@ commonly used: sensitivity = <7>; }; }; + +3) Interrupt wakeup parent +-------------------------- + +Some interrupt controllers in a SoC, are always powered on and have a select +interrupts routed to them, so that they can wakeup the SoC from suspend. These +interrupt controllers do not fall into the category of a parent interrupt +controller and can be specified by the "wakeup-parent" property and contain a +single phandle referring to the wakeup capable interrupt controller. + + Example: + wakeup-parent = <&pdc_intc>; + + +4) Interrupt mapping +-------------------- + +Sometimes interrupts may be detected by more than one interrupt controller +(depending on which controller is active). The interrupt controllers may not +be in hierarchy and therefore the interrupt controller driver is required to +establish the relationship between the same interrupt at different interrupt +controllers. If these interrupts are not sequential then a map needs to be +specified to help identify these interrupts. + +Mapping the interrupt specifiers in the device tree can be done using the +"irqdomain-map" property. The property contains interrupt specifier at the +current interrupt controller followed by the interrupt specifier at the mapped +interrupt controller. + + irqdomain-map = + +The optional properties "irqdomain-map-mask" and "irqdomain-map-pass-thru" may +be provided to help interpret the valid bits of the incoming and mapped +interrupt specifiers respectively. + + Example: + irqdomain-map = <22 0 &intc 36 0>, <24 0 &intc 37 0>; + irqdomain-map-mask = <0xff 0>; + irqdomain-map-pass-thru = <0 0xff>;