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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id q21sm3449365lfa.84.2019.05.13.12.23.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 13 May 2019 12:23:19 -0700 (PDT) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , linux-arm-kernel@lists.infradead.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , "Raju P . L . S . S . S . N" , Amit Kucheria , Bjorn Andersson , Stephen Boyd , Niklas Cassel , Tony Lindgren , Kevin Hilman , Lina Iyer , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , Souvik Chakravarty , linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Ulf Hansson Subject: [PATCH 08/18] drivers: firmware: psci: Prepare to support PM domains Date: Mon, 13 May 2019 21:22:50 +0200 Message-Id: <20190513192300.653-9-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190513192300.653-1-ulf.hansson@linaro.org> References: <20190513192300.653-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Subsequent changes implements support for PM domains to PSCI. Those changes are mainly implemented in a new separate c-file, hence a couple of the internal PSCI functions needs to be shared to be accessible. Let's do that via adding a new PSCI header file. Moreover, to implement support for PM domains, switching the PSCI FW into the OS initiated mode is sometimes needed. Therefore, let's share a new function that implement this. Signed-off-by: Ulf Hansson --- Changes: - Convert psci_set_osi_mode() to return an int. - Don't share psci_get_domain_state() as that's no longer needed. - Update changelog. --- drivers/firmware/psci/psci.c | 17 ++++++++++++++--- drivers/firmware/psci/psci.h | 16 ++++++++++++++++ 2 files changed, 30 insertions(+), 3 deletions(-) create mode 100644 drivers/firmware/psci/psci.h diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 4aec513136e4..0e91d864e346 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -34,6 +34,8 @@ #include #include +#include "psci.h" + /* * While a 64-bit OS can make calls with SMC32 calling conventions, for some * calls it is necessary to use SMC64 to pass or return 64-bit values. @@ -96,7 +98,7 @@ static inline bool psci_has_ext_power_state(void) PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK; } -static inline bool psci_has_osi_support(void) +bool psci_has_osi_support(void) { return psci_cpu_suspend_feature & PSCI_1_0_OS_INITIATED; } @@ -161,6 +163,15 @@ static u32 psci_get_version(void) return invoke_psci_fn(PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0); } +int psci_set_osi_mode(void) +{ + int err; + + err = invoke_psci_fn(PSCI_1_0_FN_SET_SUSPEND_MODE, + PSCI_1_0_SUSPEND_MODE_OSI, 0, 0); + return psci_to_linux_errno(err); +} + static int psci_cpu_suspend(u32 state, unsigned long entry_point) { int err; @@ -292,12 +303,12 @@ static inline u32 psci_get_domain_state(void) return __this_cpu_read(domain_state); } -static inline void psci_set_domain_state(u32 state) +void psci_set_domain_state(u32 state) { __this_cpu_write(domain_state, state); } -static int psci_dt_parse_state_node(struct device_node *np, u32 *state) +int psci_dt_parse_state_node(struct device_node *np, u32 *state) { int err = of_property_read_u32(np, "arm,psci-suspend-param", state); diff --git a/drivers/firmware/psci/psci.h b/drivers/firmware/psci/psci.h new file mode 100644 index 000000000000..f2277c3ad405 --- /dev/null +++ b/drivers/firmware/psci/psci.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __PSCI_H +#define __PSCI_H + +struct device_node; + +int psci_set_osi_mode(void); +bool psci_has_osi_support(void); + +#ifdef CONFIG_CPU_IDLE +void psci_set_domain_state(u32 state); +int psci_dt_parse_state_node(struct device_node *np, u32 *state); +#endif + +#endif /* __PSCI_H */