| Message ID | 20191217130352.1.Id8562de45e8441cac34699047e25e7424281e9d4@changeid (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 29c5cb641b59057bae0fe243da5b3b1a1e760227 |
| Headers | show |
| Series | arm64: dts: qcom: sc7180: Fix I2C/UART numbers 2, 4, 7, and 9 | expand |
On Tue, Dec 17, 2019 at 01:04:07PM -0800, Douglas Anderson wrote: > Commit f4a73f5e2633 ("pinctrl: qcom: sc7180: Add new qup functions") > has landed which means that we absolutely need to use the proper names > for the pinmuxing for I2C/UART numbers 2, 4, 7, and 9. Let's do it. > > For reference: > - If you get only one of this commit and the pinctrl commit then none > of I2C/UART 2, 4, 7, and 9 will work. > - If you get neither of these commits then I2C 2, 4, 7, and 9 will > work but not UART. > > ...but despite the above it should be fine for this commit to land in > the Qualcomm tree because sc7180.dtsi only exists there (it hasn't > made it to mainline). > > Fixes: ba3fc6496366 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1") > Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
On 12/18/2019 2:34 AM, Douglas Anderson wrote: > Commit f4a73f5e2633 ("pinctrl: qcom: sc7180: Add new qup functions") > has landed which means that we absolutely need to use the proper names > for the pinmuxing for I2C/UART numbers 2, 4, 7, and 9. Let's do it. > > For reference: > - If you get only one of this commit and the pinctrl commit then none > of I2C/UART 2, 4, 7, and 9 will work. > - If you get neither of these commits then I2C 2, 4, 7, and 9 will > work but not UART. > > ...but despite the above it should be fine for this commit to land in > the Qualcomm tree because sc7180.dtsi only exists there (it hasn't > made it to mainline). > > Fixes: ba3fc6496366 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1") > Signed-off-by: Douglas Anderson <dianders@chromium.org> > --- Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org> > > arch/arm64/boot/dts/qcom/sc7180.dtsi | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index 52a58615ec06..faa9ef733204 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -717,7 +717,7 @@ pinmux { > qup_i2c2_default: qup-i2c2-default { > pinmux { > pins = "gpio15", "gpio16"; > - function = "qup02"; > + function = "qup02_i2c"; > }; > }; > > @@ -731,7 +731,7 @@ pinmux { > qup_i2c4_default: qup-i2c4-default { > pinmux { > pins = "gpio115", "gpio116"; > - function = "qup04"; > + function = "qup04_i2c"; > }; > }; > > @@ -752,7 +752,7 @@ pinmux { > qup_i2c7_default: qup-i2c7-default { > pinmux { > pins = "gpio6", "gpio7"; > - function = "qup11"; > + function = "qup11_i2c"; > }; > }; > > @@ -766,7 +766,7 @@ pinmux { > qup_i2c9_default: qup-i2c9-default { > pinmux { > pins = "gpio46", "gpio47"; > - function = "qup13"; > + function = "qup13_i2c"; > }; > }; > > @@ -867,7 +867,7 @@ pinmux { > qup_uart2_default: qup-uart2-default { > pinmux { > pins = "gpio15", "gpio16"; > - function = "qup02"; > + function = "qup02_uart"; > }; > }; > > @@ -882,7 +882,7 @@ pinmux { > qup_uart4_default: qup-uart4-default { > pinmux { > pins = "gpio115", "gpio116"; > - function = "qup04"; > + function = "qup04_uart"; > }; > }; > > @@ -905,7 +905,7 @@ pinmux { > qup_uart7_default: qup-uart7-default { > pinmux { > pins = "gpio6", "gpio7"; > - function = "qup11"; > + function = "qup11_uart"; > }; > }; > > @@ -919,7 +919,7 @@ pinmux { > qup_uart9_default: qup-uart9-default { > pinmux { > pins = "gpio46", "gpio47"; > - function = "qup13"; > + function = "qup13_uart"; > }; > }; > >
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 52a58615ec06..faa9ef733204 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -717,7 +717,7 @@ pinmux { qup_i2c2_default: qup-i2c2-default { pinmux { pins = "gpio15", "gpio16"; - function = "qup02"; + function = "qup02_i2c"; }; }; @@ -731,7 +731,7 @@ pinmux { qup_i2c4_default: qup-i2c4-default { pinmux { pins = "gpio115", "gpio116"; - function = "qup04"; + function = "qup04_i2c"; }; }; @@ -752,7 +752,7 @@ pinmux { qup_i2c7_default: qup-i2c7-default { pinmux { pins = "gpio6", "gpio7"; - function = "qup11"; + function = "qup11_i2c"; }; }; @@ -766,7 +766,7 @@ pinmux { qup_i2c9_default: qup-i2c9-default { pinmux { pins = "gpio46", "gpio47"; - function = "qup13"; + function = "qup13_i2c"; }; }; @@ -867,7 +867,7 @@ pinmux { qup_uart2_default: qup-uart2-default { pinmux { pins = "gpio15", "gpio16"; - function = "qup02"; + function = "qup02_uart"; }; }; @@ -882,7 +882,7 @@ pinmux { qup_uart4_default: qup-uart4-default { pinmux { pins = "gpio115", "gpio116"; - function = "qup04"; + function = "qup04_uart"; }; }; @@ -905,7 +905,7 @@ pinmux { qup_uart7_default: qup-uart7-default { pinmux { pins = "gpio6", "gpio7"; - function = "qup11"; + function = "qup11_uart"; }; }; @@ -919,7 +919,7 @@ pinmux { qup_uart9_default: qup-uart9-default { pinmux { pins = "gpio46", "gpio47"; - function = "qup13"; + function = "qup13_uart"; }; };
Commit f4a73f5e2633 ("pinctrl: qcom: sc7180: Add new qup functions") has landed which means that we absolutely need to use the proper names for the pinmuxing for I2C/UART numbers 2, 4, 7, and 9. Let's do it. For reference: - If you get only one of this commit and the pinctrl commit then none of I2C/UART 2, 4, 7, and 9 will work. - If you get neither of these commits then I2C 2, 4, 7, and 9 will work but not UART. ...but despite the above it should be fine for this commit to land in the Qualcomm tree because sc7180.dtsi only exists there (it hasn't made it to mainline). Fixes: ba3fc6496366 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1") Signed-off-by: Douglas Anderson <dianders@chromium.org> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)