diff mbox series

clk: qcom: Make gcc_gpu_cfg_ahb_clk critical

Message ID 20191217171205.5492-1-jeffrey.l.hugo@gmail.com
State New, archived
Headers show
Series clk: qcom: Make gcc_gpu_cfg_ahb_clk critical | expand

Commit Message

Jeffrey Hugo Dec. 17, 2019, 5:12 p.m. UTC
Mark gcc_gpu_cfg_ahb_clk as critical on msm8998 because gpucc cannot be
accessed without it.

Fixes: b5f5f525c547 ("clk: qcom: Add MSM8998 Global Clock Control (GCC) driver")
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
---
 drivers/clk/qcom/gcc-msm8998.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Stephen Boyd Dec. 19, 2019, 6 a.m. UTC | #1
Quoting Jeffrey Hugo (2019-12-17 09:12:05)
> diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c
> index df1d7056436c..26cc1458ce4a 100644
> --- a/drivers/clk/qcom/gcc-msm8998.c
> +++ b/drivers/clk/qcom/gcc-msm8998.c
> @@ -2044,6 +2044,7 @@ static struct clk_branch gcc_gpu_cfg_ahb_clk = {
>                 .hw.init = &(struct clk_init_data){
>                         .name = "gcc_gpu_cfg_ahb_clk",
>                         .ops = &clk_branch2_ops,
> +                       .flags = CLK_IS_CRITICAL, /* to access gpucc */

Can we not do the thing that Bjorn did to turn on ahb clks with runtime
PM for clk controllers that need them? See 892df0191b29 ("clk: qcom: Add
QCS404 TuringCC").
Jeffrey Hugo Dec. 19, 2019, 2:20 p.m. UTC | #2
On Wed, Dec 18, 2019 at 11:00 PM Stephen Boyd <sboyd@kernel.org> wrote:
>
> Quoting Jeffrey Hugo (2019-12-17 09:12:05)
> > diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c
> > index df1d7056436c..26cc1458ce4a 100644
> > --- a/drivers/clk/qcom/gcc-msm8998.c
> > +++ b/drivers/clk/qcom/gcc-msm8998.c
> > @@ -2044,6 +2044,7 @@ static struct clk_branch gcc_gpu_cfg_ahb_clk = {
> >                 .hw.init = &(struct clk_init_data){
> >                         .name = "gcc_gpu_cfg_ahb_clk",
> >                         .ops = &clk_branch2_ops,
> > +                       .flags = CLK_IS_CRITICAL, /* to access gpucc */
>
> Can we not do the thing that Bjorn did to turn on ahb clks with runtime
> PM for clk controllers that need them? See 892df0191b29 ("clk: qcom: Add
> QCS404 TuringCC").
>

Interesting.  I didn't think of that solution, nor was I aware of that
change.  Let me have a look.  Thanks for the tip.
Stephen Boyd Dec. 24, 2019, 2:23 a.m. UTC | #3
Quoting Jeffrey Hugo (2019-12-19 06:20:23)
> On Wed, Dec 18, 2019 at 11:00 PM Stephen Boyd <sboyd@kernel.org> wrote:
> >
> > Quoting Jeffrey Hugo (2019-12-17 09:12:05)
> > > diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c
> > > index df1d7056436c..26cc1458ce4a 100644
> > > --- a/drivers/clk/qcom/gcc-msm8998.c
> > > +++ b/drivers/clk/qcom/gcc-msm8998.c
> > > @@ -2044,6 +2044,7 @@ static struct clk_branch gcc_gpu_cfg_ahb_clk = {
> > >                 .hw.init = &(struct clk_init_data){
> > >                         .name = "gcc_gpu_cfg_ahb_clk",
> > >                         .ops = &clk_branch2_ops,
> > > +                       .flags = CLK_IS_CRITICAL, /* to access gpucc */
> >
> > Can we not do the thing that Bjorn did to turn on ahb clks with runtime
> > PM for clk controllers that need them? See 892df0191b29 ("clk: qcom: Add
> > QCS404 TuringCC").
> >
> 
> Interesting.  I didn't think of that solution, nor was I aware of that
> change.  Let me have a look.  Thanks for the tip.

The other option is to just always turn the clk on and leave it enabled
forever. I believe Bjorn had to use runtime PM because the clk would
turn off when the subsystem was reset. Maybe in the GPU case that isn't
true so we can just turn on the AHB and not try anything else. If that
works then I'd prefer that so we can save on code/data size.
diff mbox series

Patch

diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c
index df1d7056436c..26cc1458ce4a 100644
--- a/drivers/clk/qcom/gcc-msm8998.c
+++ b/drivers/clk/qcom/gcc-msm8998.c
@@ -2044,6 +2044,7 @@  static struct clk_branch gcc_gpu_cfg_ahb_clk = {
 		.hw.init = &(struct clk_init_data){
 			.name = "gcc_gpu_cfg_ahb_clk",
 			.ops = &clk_branch2_ops,
+			.flags = CLK_IS_CRITICAL, /* to access gpucc */
 		},
 	},
 };