| Message ID | 20191223143046.3376299-4-vkoul@kernel.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 7d59e8e8fdd0d690c7b6956d591125321a508c5f |
| Headers | show |
| Series | phy: qcom-qmp: Fixes and updates for sm8150 | expand |
On 12/23/2019 8:00 PM, Vinod Koul wrote: > SM8150 QMPY phy for UFS and onwards the PHY_SW_RESET is present in PHY's > PCS register so we should not mark no_pcs_sw_reset for sm8150 and > onwards > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > --- > drivers/phy/qualcomm/phy-qcom-qmp.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c > index 4f2e65c7cf45..ce5e18f188c3 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c > @@ -1389,7 +1389,6 @@ static const struct qmp_phy_cfg sm8150_ufsphy_cfg = { > .pwrdn_ctrl = SW_PWRDN, > > .is_dual_lane_phy = true, > - .no_pcs_sw_reset = true, > }; > Reviewed-by: Manu Gautam <mgautam@codeaurora.org>
On 2019-12-23 22:30, Vinod Koul wrote: > SM8150 QMPY phy for UFS and onwards the PHY_SW_RESET is present in > PHY's > PCS register so we should not mark no_pcs_sw_reset for sm8150 and > onwards > > Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Can Guo <cang@codeaurora.org> > --- > drivers/phy/qualcomm/phy-qcom-qmp.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c > b/drivers/phy/qualcomm/phy-qcom-qmp.c > index 4f2e65c7cf45..ce5e18f188c3 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c > @@ -1389,7 +1389,6 @@ static const struct qmp_phy_cfg sm8150_ufsphy_cfg > = { > .pwrdn_ctrl = SW_PWRDN, > > .is_dual_lane_phy = true, > - .no_pcs_sw_reset = true, > }; > > static void qcom_qmp_phy_configure(void __iomem *base,
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index 4f2e65c7cf45..ce5e18f188c3 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -1389,7 +1389,6 @@ static const struct qmp_phy_cfg sm8150_ufsphy_cfg = { .pwrdn_ctrl = SW_PWRDN, .is_dual_lane_phy = true, - .no_pcs_sw_reset = true, }; static void qcom_qmp_phy_configure(void __iomem *base,
SM8150 QMPY phy for UFS and onwards the PHY_SW_RESET is present in PHY's PCS register so we should not mark no_pcs_sw_reset for sm8150 and onwards Signed-off-by: Vinod Koul <vkoul@kernel.org> --- drivers/phy/qualcomm/phy-qcom-qmp.c | 1 - 1 file changed, 1 deletion(-)