@@ -318,6 +318,46 @@ pinconf {
};
};
+&usb2 {
+ status = "okay";
+};
+
+&usb2_phy_sec {
+ vdd-supply = <&vreg_l4_1p2>;
+ vdda1p8-supply = <&vreg_l5_1p8>;
+ vdda3p3-supply = <&vreg_l12_3p3>;
+ status = "okay";
+};
+
+&usb3 {
+ status = "okay";
+ dwc3@7580000 {
+ usb-role-switch;
+ usb_con: connector {
+ compatible = "gpio-usb-b-connector";
+ label = "USB-C";
+ id-gpios = <&tlmm 116 GPIO_ACTIVE_HIGH>;
+ vbus-supply = <&usb3_vbus_reg>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb3_id_pin>, <&usb3_vbus_pin>;
+ status = "okay";
+ };
+ };
+};
+
+&usb2_phy_prim {
+ vdd-supply = <&vreg_l4_1p2>;
+ vdda1p8-supply = <&vreg_l5_1p8>;
+ vdda3p3-supply = <&vreg_l12_3p3>;
+ status = "okay";
+};
+
+&usb3_phy {
+ vdd-supply = <&vreg_l3_1p05>;
+ vdda1p8-supply = <&vreg_l5_1p8>;
+ status = "okay";
+};
+
&wifi {
status = "okay";
vdd-0.8-cx-mx-supply = <&vreg_l2_1p275>;
This patch enables the primary and secondary USB controllers on the qcs404-evb. Primary: The primary USB controller has - One USB3 SS PHY using gpio-usb-conn - One USB2 HS PHY in device mode only and no connector driver associated. Secondary: The second DWC3 controller which has one USB Hi-Speed PHY attached to it. Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 40 ++++++++++++++++++++++++ 1 file changed, 40 insertions(+)