diff mbox series

[v7,3/3] ARM: dts: qcom: ipq4019: add USB devicetree nodes

Message ID 20200503201823.531757-3-robert.marko@sartura.hr (mailing list archive)
State New, archived
Headers show
Series [v7,1/3] phy: add driver for Qualcomm IPQ40xx USB PHY | expand

Commit Message

Robert Marko May 3, 2020, 8:18 p.m. UTC
From: John Crispin <john@phrozen.org>

Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
---
Changes from v6 to v7:
* Remove changes to qcom-ipq4019-ap.dk01.1.dtsi
It has slipped in unwanted, we only want to add
nodes to the DTSI.

 arch/arm/boot/dts/qcom-ipq4019.dtsi | 74 +++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)

Comments

Vinod Koul May 4, 2020, 7:39 a.m. UTC | #1
On 03-05-20, 22:18, Robert Marko wrote:
> From: John Crispin <john@phrozen.org>
> 
> Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.

Reviewed-by: Vinod Koul <vkoul@kernel.org>

Bjorn, I have picked the phy and dt binding, feel free to apply this one

Thanks
Robert Marko May 29, 2020, 9:36 a.m. UTC | #2
On Mon, May 4, 2020 at 9:39 AM Vinod Koul <vkoul@kernel.org> wrote:
>
> On 03-05-20, 22:18, Robert Marko wrote:
> > From: John Crispin <john@phrozen.org>
> >
> > Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.
>
> Reviewed-by: Vinod Koul <vkoul@kernel.org>
>
> Bjorn, I have picked the phy and dt binding, feel free to apply this one
>
> Thanks
> --
> ~Vinod

Any chance of this landing into 5.7?
Driver and bindings have been merged, but I don't see DT nodes queued.

Regards,
Robert
Robert Marko June 9, 2020, 2:45 p.m. UTC | #3
HI,
Vinod can you maybe pick this?

It would be great to have nodes in 5.8 along the driver

Thank
Robert

On Fri, May 29, 2020 at 11:36 AM Robert Marko <robert.marko@sartura.hr> wrote:
>
> On Mon, May 4, 2020 at 9:39 AM Vinod Koul <vkoul@kernel.org> wrote:
> >
> > On 03-05-20, 22:18, Robert Marko wrote:
> > > From: John Crispin <john@phrozen.org>
> > >
> > > Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.
> >
> > Reviewed-by: Vinod Koul <vkoul@kernel.org>
> >
> > Bjorn, I have picked the phy and dt binding, feel free to apply this one
> >
> > Thanks
> > --
> > ~Vinod
>
> Any chance of this landing into 5.7?
> Driver and bindings have been merged, but I don't see DT nodes queued.
>
> Regards,
> Robert
Vinod Koul June 9, 2020, 4:19 p.m. UTC | #4
Hi Robert,

On 09-06-20, 16:45, Robert Marko wrote:
> HI,
> Vinod can you maybe pick this?

Sorry can't do.. this needs to go thru Bjorn..

We are in merge window so it is too late for that.
Bjorn can pick this for 5.9...

> 
> It would be great to have nodes in 5.8 along the driver
> 
> Thank
> Robert
> 
> On Fri, May 29, 2020 at 11:36 AM Robert Marko <robert.marko@sartura.hr> wrote:
> >
> > On Mon, May 4, 2020 at 9:39 AM Vinod Koul <vkoul@kernel.org> wrote:
> > >
> > > On 03-05-20, 22:18, Robert Marko wrote:
> > > > From: John Crispin <john@phrozen.org>
> > > >
> > > > Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.
> > >
> > > Reviewed-by: Vinod Koul <vkoul@kernel.org>
> > >
> > > Bjorn, I have picked the phy and dt binding, feel free to apply this one
> > >
> > > Thanks
> > > --
> > > ~Vinod
> >
> > Any chance of this landing into 5.7?
> > Driver and bindings have been merged, but I don't see DT nodes queued.
> >
> > Regards,
> > Robert
Robert Marko Aug. 6, 2020, 11:06 a.m. UTC | #5
On Tue, Jun 9, 2020 at 6:19 PM Vinod Koul <vkoul@kernel.org> wrote:
>
> Hi Robert,
>
> On 09-06-20, 16:45, Robert Marko wrote:
> > HI,
> > Vinod can you maybe pick this?
>
> Sorry can't do.. this needs to go thru Bjorn..
>
> We are in merge window so it is too late for that.
> Bjorn can pick this for 5.9...
Hi, can this be picked up for 5.9?
Driver and DT bindings are already in 5.8

Thanks
>
> >
> > It would be great to have nodes in 5.8 along the driver
> >
> > Thank
> > Robert
> >
> > On Fri, May 29, 2020 at 11:36 AM Robert Marko <robert.marko@sartura.hr> wrote:
> > >
> > > On Mon, May 4, 2020 at 9:39 AM Vinod Koul <vkoul@kernel.org> wrote:
> > > >
> > > > On 03-05-20, 22:18, Robert Marko wrote:
> > > > > From: John Crispin <john@phrozen.org>
> > > > >
> > > > > Since we now have driver for the USB PHY, lets add the necessary nodes to DTSI.
> > > >
> > > > Reviewed-by: Vinod Koul <vkoul@kernel.org>
> > > >
> > > > Bjorn, I have picked the phy and dt binding, feel free to apply this one
> > > >
> > > > Thanks
> > > > --
> > > > ~Vinod
> > >
> > > Any chance of this landing into 5.7?
> > > Driver and bindings have been merged, but I don't see DT nodes queued.
> > >
> > > Regards,
> > > Robert
>
> --
> ~Vinod
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index bfa9ce4c6e69..ee45253361cb 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -604,5 +604,79 @@ 
 				reg = <4>;
 			};
 		};
+
+		usb3_ss_phy: ssphy@9a000 {
+			compatible = "qcom,usb-ss-ipq4019-phy";
+			#phy-cells = <0>;
+			reg = <0x9a000 0x800>;
+			reg-names = "phy_base";
+			resets = <&gcc USB3_UNIPHY_PHY_ARES>;
+			reset-names = "por_rst";
+			status = "disabled";
+		};
+
+		usb3_hs_phy: hsphy@a6000 {
+			compatible = "qcom,usb-hs-ipq4019-phy";
+			#phy-cells = <0>;
+			reg = <0xa6000 0x40>;
+			reg-names = "phy_base";
+			resets = <&gcc USB3_HSPHY_POR_ARES>, <&gcc USB3_HSPHY_S_ARES>;
+			reset-names = "por_rst", "srif_rst";
+			status = "disabled";
+		};
+
+		usb3@8af8800 {
+			compatible = "qcom,dwc3";
+			reg = <0x8af8800 0x100>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			clocks = <&gcc GCC_USB3_MASTER_CLK>,
+				 <&gcc GCC_USB3_SLEEP_CLK>,
+				 <&gcc GCC_USB3_MOCK_UTMI_CLK>;
+			clock-names = "master", "sleep", "mock_utmi";
+			ranges;
+			status = "disabled";
+
+			dwc3@8a00000 {
+				compatible = "snps,dwc3";
+				reg = <0x8a00000 0xf8000>;
+				interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
+				phys = <&usb3_hs_phy>, <&usb3_ss_phy>;
+				phy-names = "usb2-phy", "usb3-phy";
+				dr_mode = "host";
+			};
+		};
+
+		usb2_hs_phy: hsphy@a8000 {
+			compatible = "qcom,usb-hs-ipq4019-phy";
+			#phy-cells = <0>;
+			reg = <0xa8000 0x40>;
+			reg-names = "phy_base";
+			resets = <&gcc USB2_HSPHY_POR_ARES>, <&gcc USB2_HSPHY_S_ARES>;
+			reset-names = "por_rst", "srif_rst";
+			status = "disabled";
+		};
+
+		usb2@60f8800 {
+			compatible = "qcom,dwc3";
+			reg = <0x60f8800 0x100>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			clocks = <&gcc GCC_USB2_MASTER_CLK>,
+				 <&gcc GCC_USB2_SLEEP_CLK>,
+				 <&gcc GCC_USB2_MOCK_UTMI_CLK>;
+			clock-names = "master", "sleep", "mock_utmi";
+			ranges;
+			status = "disabled";
+
+			dwc3@6000000 {
+				compatible = "snps,dwc3";
+				reg = <0x6000000 0xf8000>;
+				interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+				phys = <&usb2_hs_phy>;
+				phy-names = "usb2-phy";
+				dr_mode = "host";
+			};
+		};
 	};
 };