diff mbox series

[1/6] arm64: dts: qcom: sm8150: add apps_smmu node

Message ID 20200524023815.21789-2-jonathan@marek.ca (mailing list archive)
State Superseded
Headers show
Series arm64: dts: qcom: smmu/USB nodes and HDK855/HDK865 dts | expand

Commit Message

Jonathan Marek May 24, 2020, 2:38 a.m. UTC
Add the apps_smmu node for sm8150. Note that adding the iommus field for
UFS is required because initializing the iommu removes the bypass mapping
that created by the bootloader.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 ++++++++++++++++++++++++++++
 1 file changed, 91 insertions(+)

Comments

Sai Prakash Ranjan May 25, 2020, 9:37 a.m. UTC | #1
Hi Jonathan,

On 2020-05-24 08:08, Jonathan Marek wrote:
> Add the apps_smmu node for sm8150. Note that adding the iommus field 
> for
> UFS is required because initializing the iommu removes the bypass 
> mapping
> that created by the bootloader.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 ++++++++++++++++++++++++++++
>  1 file changed, 91 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index a36512d1f6a1..acb839427b12 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -442,6 +442,8 @@ ufs_mem_hc: ufshc@1d84000 {
>  			resets = <&gcc GCC_UFS_PHY_BCR>;
>  			reset-names = "rst";
> 
> +			iommus = <&apps_smmu 0x300 0>;
> +
>  			clock-names =
>  				"core_clk",
>  				"bus_aggr_clk",
> @@ -706,6 +708,7 @@ usb_1_dwc3: dwc3@a600000 {
>  				compatible = "snps,dwc3";
>  				reg = <0 0x0a600000 0 0xcd00>;
>  				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> +				iommus = <&apps_smmu 0x140 0>;
>  				snps,dis_u2_susphy_quirk;
>  				snps,dis_enblslpm_quirk;
>  				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
> @@ -742,6 +745,94 @@ spmi_bus: spmi@c440000 {
>  			cell-index = <0>;
>  		};
> 
> +		apps_smmu: iommu@15000000 {
> +			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";

This should be qcom,sm8150-smmu-500 and also you need to update the 
arm-smmu
binding with this compatible in a separate patch.

-Sai
Bjorn Andersson May 29, 2020, 2:52 a.m. UTC | #2
On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:

> Add the apps_smmu node for sm8150. Note that adding the iommus field for
> UFS is required because initializing the iommu removes the bypass mapping
> that created by the bootloader.
> 

Unrelated to the patch itself; how do you disable the splash screen on
8150? "fastboot oem select-display-panel none" doesn't seem to work for
me on the MTP - and hence this would prevent my device from booting.

Thanks,
Bjorn

> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 ++++++++++++++++++++++++++++
>  1 file changed, 91 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index a36512d1f6a1..acb839427b12 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -442,6 +442,8 @@ ufs_mem_hc: ufshc@1d84000 {
>  			resets = <&gcc GCC_UFS_PHY_BCR>;
>  			reset-names = "rst";
>  
> +			iommus = <&apps_smmu 0x300 0>;
> +
>  			clock-names =
>  				"core_clk",
>  				"bus_aggr_clk",
> @@ -706,6 +708,7 @@ usb_1_dwc3: dwc3@a600000 {
>  				compatible = "snps,dwc3";
>  				reg = <0 0x0a600000 0 0xcd00>;
>  				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> +				iommus = <&apps_smmu 0x140 0>;
>  				snps,dis_u2_susphy_quirk;
>  				snps,dis_enblslpm_quirk;
>  				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
> @@ -742,6 +745,94 @@ spmi_bus: spmi@c440000 {
>  			cell-index = <0>;
>  		};
>  
> +		apps_smmu: iommu@15000000 {
> +			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
> +			reg = <0 0x15000000 0 0x100000>;
> +			#iommu-cells = <2>;
> +			#global-interrupts = <1>;
> +			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
> +		};
> +
>  		remoteproc_adsp: remoteproc@17300000 {
>  			compatible = "qcom,sm8150-adsp-pas";
>  			reg = <0x0 0x17300000 0x0 0x4040>;
> -- 
> 2.26.1
>
Jonathan Marek May 29, 2020, 3:02 a.m. UTC | #3
On 5/28/20 10:52 PM, Bjorn Andersson wrote:
> On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
> 
>> Add the apps_smmu node for sm8150. Note that adding the iommus field for
>> UFS is required because initializing the iommu removes the bypass mapping
>> that created by the bootloader.
>>
> 
> Unrelated to the patch itself; how do you disable the splash screen on
> 8150? "fastboot oem select-display-panel none" doesn't seem to work for
> me on the MTP - and hence this would prevent my device from booting.
> 
> Thanks,
> Bjorn
> 

I don't have a MTP, but on HDK855, "fastboot oem select-display-panel 
none" combined with setting the physical switch to HDMI mode (which 
switches off the 1440x2560 panel) gets it to not setup the display at 
all (just the fastboot command isn't enough).

With HDK865 though that doesn't work and I have a hack to work around it 
(writing 0 to INTF_TIMING_ENGINE_EN early on in boot will stop video 
mode scanout and it won't crash).

>> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
>> ---
>>   arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 ++++++++++++++++++++++++++++
>>   1 file changed, 91 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> index a36512d1f6a1..acb839427b12 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> @@ -442,6 +442,8 @@ ufs_mem_hc: ufshc@1d84000 {
>>   			resets = <&gcc GCC_UFS_PHY_BCR>;
>>   			reset-names = "rst";
>>   
>> +			iommus = <&apps_smmu 0x300 0>;
>> +
>>   			clock-names =
>>   				"core_clk",
>>   				"bus_aggr_clk",
>> @@ -706,6 +708,7 @@ usb_1_dwc3: dwc3@a600000 {
>>   				compatible = "snps,dwc3";
>>   				reg = <0 0x0a600000 0 0xcd00>;
>>   				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>> +				iommus = <&apps_smmu 0x140 0>;
>>   				snps,dis_u2_susphy_quirk;
>>   				snps,dis_enblslpm_quirk;
>>   				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
>> @@ -742,6 +745,94 @@ spmi_bus: spmi@c440000 {
>>   			cell-index = <0>;
>>   		};
>>   
>> +		apps_smmu: iommu@15000000 {
>> +			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
>> +			reg = <0 0x15000000 0 0x100000>;
>> +			#iommu-cells = <2>;
>> +			#global-interrupts = <1>;
>> +			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
>> +		};
>> +
>>   		remoteproc_adsp: remoteproc@17300000 {
>>   			compatible = "qcom,sm8150-adsp-pas";
>>   			reg = <0x0 0x17300000 0x0 0x4040>;
>> -- 
>> 2.26.1
>>
Bjorn Andersson May 29, 2020, 3:15 a.m. UTC | #4
On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:

> 
> 
> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
> > On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
> > 
> > > Add the apps_smmu node for sm8150. Note that adding the iommus field for
> > > UFS is required because initializing the iommu removes the bypass mapping
> > > that created by the bootloader.
> > > 
> > 
> > Unrelated to the patch itself; how do you disable the splash screen on
> > 8150? "fastboot oem select-display-panel none" doesn't seem to work for
> > me on the MTP - and hence this would prevent my device from booting.
> > 
> > Thanks,
> > Bjorn
> > 
> 
> I don't have a MTP, but on HDK855, "fastboot oem select-display-panel none"
> combined with setting the physical switch to HDMI mode (which switches off
> the 1440x2560 panel) gets it to not setup the display at all (just the
> fastboot command isn't enough).
> 

Okay, I don't think we have anything equivalent on the MTP, but good to
know.

> With HDK865 though that doesn't work and I have a hack to work around it
> (writing 0 to INTF_TIMING_ENGINE_EN early on in boot will stop video mode
> scanout and it won't crash).
> 

Then we need to sort this out in the arm-smmu driver before we can
enable the apps_smmu node on 8250. I did receive some guidance from Will
on the subject and have started looking into this.

Thanks,
Bjorn

> > > Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> > > ---
> > >   arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 ++++++++++++++++++++++++++++
> > >   1 file changed, 91 insertions(+)
> > > 
> > > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > > index a36512d1f6a1..acb839427b12 100644
> > > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > > @@ -442,6 +442,8 @@ ufs_mem_hc: ufshc@1d84000 {
> > >   			resets = <&gcc GCC_UFS_PHY_BCR>;
> > >   			reset-names = "rst";
> > > +			iommus = <&apps_smmu 0x300 0>;
> > > +
> > >   			clock-names =
> > >   				"core_clk",
> > >   				"bus_aggr_clk",
> > > @@ -706,6 +708,7 @@ usb_1_dwc3: dwc3@a600000 {
> > >   				compatible = "snps,dwc3";
> > >   				reg = <0 0x0a600000 0 0xcd00>;
> > >   				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> > > +				iommus = <&apps_smmu 0x140 0>;
> > >   				snps,dis_u2_susphy_quirk;
> > >   				snps,dis_enblslpm_quirk;
> > >   				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
> > > @@ -742,6 +745,94 @@ spmi_bus: spmi@c440000 {
> > >   			cell-index = <0>;
> > >   		};
> > > +		apps_smmu: iommu@15000000 {
> > > +			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
> > > +			reg = <0 0x15000000 0 0x100000>;
> > > +			#iommu-cells = <2>;
> > > +			#global-interrupts = <1>;
> > > +			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
> > > +				     <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
> > > +		};
> > > +
> > >   		remoteproc_adsp: remoteproc@17300000 {
> > >   			compatible = "qcom,sm8150-adsp-pas";
> > >   			reg = <0x0 0x17300000 0x0 0x4040>;
> > > -- 
> > > 2.26.1
> > >
Jonathan Marek May 29, 2020, 3:34 a.m. UTC | #5
On 5/28/20 11:15 PM, Bjorn Andersson wrote:
> On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
> 
>>
>>
>> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
>>> On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
>>>
>>>> Add the apps_smmu node for sm8150. Note that adding the iommus field for
>>>> UFS is required because initializing the iommu removes the bypass mapping
>>>> that created by the bootloader.
>>>>
>>>
>>> Unrelated to the patch itself; how do you disable the splash screen on
>>> 8150? "fastboot oem select-display-panel none" doesn't seem to work for
>>> me on the MTP - and hence this would prevent my device from booting.
>>>
>>> Thanks,
>>> Bjorn
>>>
>>
>> I don't have a MTP, but on HDK855, "fastboot oem select-display-panel none"
>> combined with setting the physical switch to HDMI mode (which switches off
>> the 1440x2560 panel) gets it to not setup the display at all (just the
>> fastboot command isn't enough).
>>
> 
> Okay, I don't think we have anything equivalent on the MTP, but good to
> know.
> 
>> With HDK865 though that doesn't work and I have a hack to work around it
>> (writing 0 to INTF_TIMING_ENGINE_EN early on in boot will stop video mode
>> scanout and it won't crash).
>>
> 
> Then we need to sort this out in the arm-smmu driver before we can
> enable the apps_smmu node on 8250. I did receive some guidance from Will
> on the subject and have started looking into this.
> 

That's annoying because a lot depends on apps_mmu. GPU is an exception 
with its own MMU but pretty much everything else uses apps_smmu (does it 
make sense to add USB nodes if it won't work without apps_smmu?) Is this 
something that will get resolved soon?

FWIW, I have another sm8250 board which does not need the workaround 
(its bootloader does not set up the display). AFAIK modifying the 
bootloader to not set up any display is a trivial modification (assuming 
that's an option).

> Thanks,
> Bjorn
> 
>>>> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
>>>> ---
>>>>    arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 ++++++++++++++++++++++++++++
>>>>    1 file changed, 91 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>> index a36512d1f6a1..acb839427b12 100644
>>>> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>> @@ -442,6 +442,8 @@ ufs_mem_hc: ufshc@1d84000 {
>>>>    			resets = <&gcc GCC_UFS_PHY_BCR>;
>>>>    			reset-names = "rst";
>>>> +			iommus = <&apps_smmu 0x300 0>;
>>>> +
>>>>    			clock-names =
>>>>    				"core_clk",
>>>>    				"bus_aggr_clk",
>>>> @@ -706,6 +708,7 @@ usb_1_dwc3: dwc3@a600000 {
>>>>    				compatible = "snps,dwc3";
>>>>    				reg = <0 0x0a600000 0 0xcd00>;
>>>>    				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>>>> +				iommus = <&apps_smmu 0x140 0>;
>>>>    				snps,dis_u2_susphy_quirk;
>>>>    				snps,dis_enblslpm_quirk;
>>>>    				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
>>>> @@ -742,6 +745,94 @@ spmi_bus: spmi@c440000 {
>>>>    			cell-index = <0>;
>>>>    		};
>>>> +		apps_smmu: iommu@15000000 {
>>>> +			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
>>>> +			reg = <0 0x15000000 0 0x100000>;
>>>> +			#iommu-cells = <2>;
>>>> +			#global-interrupts = <1>;
>>>> +			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
>>>> +		};
>>>> +
>>>>    		remoteproc_adsp: remoteproc@17300000 {
>>>>    			compatible = "qcom,sm8150-adsp-pas";
>>>>    			reg = <0x0 0x17300000 0x0 0x4040>;
>>>> -- 
>>>> 2.26.1
>>>>
Bjorn Andersson May 29, 2020, 3:42 a.m. UTC | #6
On Thu 28 May 20:34 PDT 2020, Jonathan Marek wrote:

> On 5/28/20 11:15 PM, Bjorn Andersson wrote:
> > On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
> > 
> > > 
> > > 
> > > On 5/28/20 10:52 PM, Bjorn Andersson wrote:
> > > > On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
> > > > 
> > > > > Add the apps_smmu node for sm8150. Note that adding the iommus field for
> > > > > UFS is required because initializing the iommu removes the bypass mapping
> > > > > that created by the bootloader.
> > > > > 
> > > > 
> > > > Unrelated to the patch itself; how do you disable the splash screen on
> > > > 8150? "fastboot oem select-display-panel none" doesn't seem to work for
> > > > me on the MTP - and hence this would prevent my device from booting.
> > > > 
> > > > Thanks,
> > > > Bjorn
> > > > 
> > > 
> > > I don't have a MTP, but on HDK855, "fastboot oem select-display-panel none"
> > > combined with setting the physical switch to HDMI mode (which switches off
> > > the 1440x2560 panel) gets it to not setup the display at all (just the
> > > fastboot command isn't enough).
> > > 
> > 
> > Okay, I don't think we have anything equivalent on the MTP, but good to
> > know.
> > 
> > > With HDK865 though that doesn't work and I have a hack to work around it
> > > (writing 0 to INTF_TIMING_ENGINE_EN early on in boot will stop video mode
> > > scanout and it won't crash).
> > > 
> > 
> > Then we need to sort this out in the arm-smmu driver before we can
> > enable the apps_smmu node on 8250. I did receive some guidance from Will
> > on the subject and have started looking into this.
> > 
> 
> That's annoying because a lot depends on apps_mmu. GPU is an exception with
> its own MMU but pretty much everything else uses apps_smmu (does it make
> sense to add USB nodes if it won't work without apps_smmu?) Is this
> something that will get resolved soon?
> 

We have a number of boards where this is becoming a critical issue, so
we better find an acceptable solution to this very soon.

Regards,
Bjorn

> FWIW, I have another sm8250 board which does not need the workaround (its
> bootloader does not set up the display). AFAIK modifying the bootloader to
> not set up any display is a trivial modification (assuming that's an
> option).
> 
> > Thanks,
> > Bjorn
> > 
> > > > > Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> > > > > ---
> > > > >    arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 ++++++++++++++++++++++++++++
> > > > >    1 file changed, 91 insertions(+)
> > > > > 
> > > > > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > > > > index a36512d1f6a1..acb839427b12 100644
> > > > > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > > > > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > > > > @@ -442,6 +442,8 @@ ufs_mem_hc: ufshc@1d84000 {
> > > > >    			resets = <&gcc GCC_UFS_PHY_BCR>;
> > > > >    			reset-names = "rst";
> > > > > +			iommus = <&apps_smmu 0x300 0>;
> > > > > +
> > > > >    			clock-names =
> > > > >    				"core_clk",
> > > > >    				"bus_aggr_clk",
> > > > > @@ -706,6 +708,7 @@ usb_1_dwc3: dwc3@a600000 {
> > > > >    				compatible = "snps,dwc3";
> > > > >    				reg = <0 0x0a600000 0 0xcd00>;
> > > > >    				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> > > > > +				iommus = <&apps_smmu 0x140 0>;
> > > > >    				snps,dis_u2_susphy_quirk;
> > > > >    				snps,dis_enblslpm_quirk;
> > > > >    				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
> > > > > @@ -742,6 +745,94 @@ spmi_bus: spmi@c440000 {
> > > > >    			cell-index = <0>;
> > > > >    		};
> > > > > +		apps_smmu: iommu@15000000 {
> > > > > +			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
> > > > > +			reg = <0 0x15000000 0 0x100000>;
> > > > > +			#iommu-cells = <2>;
> > > > > +			#global-interrupts = <1>;
> > > > > +			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
> > > > > +				     <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
> > > > > +		};
> > > > > +
> > > > >    		remoteproc_adsp: remoteproc@17300000 {
> > > > >    			compatible = "qcom,sm8150-adsp-pas";
> > > > >    			reg = <0x0 0x17300000 0x0 0x4040>;
> > > > > -- 
> > > > > 2.26.1
> > > > >
Sai Prakash Ranjan June 5, 2020, 2:03 p.m. UTC | #7
On 2020-05-29 08:45, Bjorn Andersson wrote:
> On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
> 
>> 
>> 
>> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
>> > On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
>> >
>> > > Add the apps_smmu node for sm8150. Note that adding the iommus field for
>> > > UFS is required because initializing the iommu removes the bypass mapping
>> > > that created by the bootloader.
>> > >
>> >
>> > Unrelated to the patch itself; how do you disable the splash screen on
>> > 8150? "fastboot oem select-display-panel none" doesn't seem to work for
>> > me on the MTP - and hence this would prevent my device from booting.
>> >
>> > Thanks,
>> > Bjorn
>> >
>> 
>> I don't have a MTP, but on HDK855, "fastboot oem select-display-panel 
>> none"
>> combined with setting the physical switch to HDMI mode (which switches 
>> off
>> the 1440x2560 panel) gets it to not setup the display at all (just the
>> fastboot command isn't enough).
>> 
> 
> Okay, I don't think we have anything equivalent on the MTP, but good to
> know.
> 

Actually I tried out this in SM8150 MTP and it works fine for me,

"fastboot set_active a; fastboot set_active b; fastboot set_active a; 
fastboot oem select-display-panel none; fastboot reboot bootloader; 
fastboot boot boot-sm8150.img"

Also I need to switch slots everytime like above, otherwise I always see 
some error
while loading the boot image.

Thanks,
Sai
Jonathan Marek June 5, 2020, 2:10 p.m. UTC | #8
On 6/5/20 10:03 AM, Sai Prakash Ranjan wrote:
> On 2020-05-29 08:45, Bjorn Andersson wrote:
>> On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
>>
>>>
>>>
>>> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
>>> > On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
>>> >
>>> > > Add the apps_smmu node for sm8150. Note that adding the iommus 
>>> field for
>>> > > UFS is required because initializing the iommu removes the bypass 
>>> mapping
>>> > > that created by the bootloader.
>>> > >
>>> >
>>> > Unrelated to the patch itself; how do you disable the splash screen on
>>> > 8150? "fastboot oem select-display-panel none" doesn't seem to work 
>>> for
>>> > me on the MTP - and hence this would prevent my device from booting.
>>> >
>>> > Thanks,
>>> > Bjorn
>>> >
>>>
>>> I don't have a MTP, but on HDK855, "fastboot oem select-display-panel 
>>> none"
>>> combined with setting the physical switch to HDMI mode (which 
>>> switches off
>>> the 1440x2560 panel) gets it to not setup the display at all (just the
>>> fastboot command isn't enough).
>>>
>>
>> Okay, I don't think we have anything equivalent on the MTP, but good to
>> know.
>>
> 
> Actually I tried out this in SM8150 MTP and it works fine for me,
> 
> "fastboot set_active a; fastboot set_active b; fastboot set_active a; 
> fastboot oem select-display-panel none; fastboot reboot bootloader; 
> fastboot boot boot-sm8150.img"
> 
> Also I need to switch slots everytime like above, otherwise I always see 
> some error
> while loading the boot image.
> 

What is the error? If it is "FAILED (remote: Failed to load/authenticate 
boot image: Load Error)" then flashing/erasing boot_a will make it go 
away ("fastboot erase boot_a") for the next 6 or so "failed" boots.

> Thanks,
> Sai
>
Sai Prakash Ranjan June 5, 2020, 2:13 p.m. UTC | #9
On 2020-06-05 19:40, Jonathan Marek wrote:
> On 6/5/20 10:03 AM, Sai Prakash Ranjan wrote:
>> On 2020-05-29 08:45, Bjorn Andersson wrote:
>>> On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
>>> 
>>>> 
>>>> 
>>>> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
>>>> > On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
>>>> >
>>>> > > Add the apps_smmu node for sm8150. Note that adding the iommus field for
>>>> > > UFS is required because initializing the iommu removes the bypass mapping
>>>> > > that created by the bootloader.
>>>> > >
>>>> >
>>>> > Unrelated to the patch itself; how do you disable the splash screen on
>>>> > 8150? "fastboot oem select-display-panel none" doesn't seem to work for
>>>> > me on the MTP - and hence this would prevent my device from booting.
>>>> >
>>>> > Thanks,
>>>> > Bjorn
>>>> >
>>>> 
>>>> I don't have a MTP, but on HDK855, "fastboot oem 
>>>> select-display-panel none"
>>>> combined with setting the physical switch to HDMI mode (which 
>>>> switches off
>>>> the 1440x2560 panel) gets it to not setup the display at all (just 
>>>> the
>>>> fastboot command isn't enough).
>>>> 
>>> 
>>> Okay, I don't think we have anything equivalent on the MTP, but good 
>>> to
>>> know.
>>> 
>> 
>> Actually I tried out this in SM8150 MTP and it works fine for me,
>> 
>> "fastboot set_active a; fastboot set_active b; fastboot set_active a; 
>> fastboot oem select-display-panel none; fastboot reboot bootloader; 
>> fastboot boot boot-sm8150.img"
>> 
>> Also I need to switch slots everytime like above, otherwise I always 
>> see some error
>> while loading the boot image.
>> 
> 
> What is the error? If it is "FAILED (remote: Failed to
> load/authenticate boot image: Load Error)" then flashing/erasing
> boot_a will make it go away ("fastboot erase boot_a") for the next 6
> or so "failed" boots.
> 

Yes this exact error.

-Sai
Sai Prakash Ranjan June 5, 2020, 2:15 p.m. UTC | #10
On 2020-05-25 15:07, Sai Prakash Ranjan wrote:
> Hi Jonathan,
> 
> On 2020-05-24 08:08, Jonathan Marek wrote:
>> Add the apps_smmu node for sm8150. Note that adding the iommus field 
>> for
>> UFS is required because initializing the iommu removes the bypass 
>> mapping
>> that created by the bootloader.
>> 
>> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
>> ---
>>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 
>> ++++++++++++++++++++++++++++
>>  1 file changed, 91 insertions(+)
>> 
>> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> index a36512d1f6a1..acb839427b12 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> @@ -442,6 +442,8 @@ ufs_mem_hc: ufshc@1d84000 {
>>  			resets = <&gcc GCC_UFS_PHY_BCR>;
>>  			reset-names = "rst";
>> 
>> +			iommus = <&apps_smmu 0x300 0>;
>> +
>>  			clock-names =
>>  				"core_clk",
>>  				"bus_aggr_clk",
>> @@ -706,6 +708,7 @@ usb_1_dwc3: dwc3@a600000 {
>>  				compatible = "snps,dwc3";
>>  				reg = <0 0x0a600000 0 0xcd00>;
>>  				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>> +				iommus = <&apps_smmu 0x140 0>;
>>  				snps,dis_u2_susphy_quirk;
>>  				snps,dis_enblslpm_quirk;
>>  				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
>> @@ -742,6 +745,94 @@ spmi_bus: spmi@c440000 {
>>  			cell-index = <0>;
>>  		};
>> 
>> +		apps_smmu: iommu@15000000 {
>> +			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
> 
> This should be qcom,sm8150-smmu-500 and also you need to update the 
> arm-smmu
> binding with this compatible in a separate patch.
> 

I tested out this series with my coresight patches for enabling SMMU 
translation
for ETR on SM8150, it works fine. With this above comment addressed and 
with
Bjorn's comments on commit description addressed,

Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>

Thanks,
Sai
Nicolas Dechesne June 5, 2020, 2:31 p.m. UTC | #11
On Fri, Jun 5, 2020 at 4:14 PM Sai Prakash Ranjan
<saiprakash.ranjan@codeaurora.org> wrote:
>
> On 2020-06-05 19:40, Jonathan Marek wrote:
> > On 6/5/20 10:03 AM, Sai Prakash Ranjan wrote:
> >> On 2020-05-29 08:45, Bjorn Andersson wrote:
> >>> On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
> >>>
> >>>>
> >>>>
> >>>> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
> >>>> > On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
> >>>> >
> >>>> > > Add the apps_smmu node for sm8150. Note that adding the iommus field for
> >>>> > > UFS is required because initializing the iommu removes the bypass mapping
> >>>> > > that created by the bootloader.
> >>>> > >
> >>>> >
> >>>> > Unrelated to the patch itself; how do you disable the splash screen on
> >>>> > 8150? "fastboot oem select-display-panel none" doesn't seem to work for
> >>>> > me on the MTP - and hence this would prevent my device from booting.
> >>>> >
> >>>> > Thanks,
> >>>> > Bjorn
> >>>> >
> >>>>
> >>>> I don't have a MTP, but on HDK855, "fastboot oem
> >>>> select-display-panel none"
> >>>> combined with setting the physical switch to HDMI mode (which
> >>>> switches off
> >>>> the 1440x2560 panel) gets it to not setup the display at all (just
> >>>> the
> >>>> fastboot command isn't enough).
> >>>>
> >>>
> >>> Okay, I don't think we have anything equivalent on the MTP, but good
> >>> to
> >>> know.
> >>>
> >>
> >> Actually I tried out this in SM8150 MTP and it works fine for me,
> >>
> >> "fastboot set_active a; fastboot set_active b; fastboot set_active a;
> >> fastboot oem select-display-panel none; fastboot reboot bootloader;
> >> fastboot boot boot-sm8150.img"
> >>
> >> Also I need to switch slots everytime like above, otherwise I always
> >> see some error
> >> while loading the boot image.
> >>
> >
> > What is the error? If it is "FAILED (remote: Failed to
> > load/authenticate boot image: Load Error)" then flashing/erasing
> > boot_a will make it go away ("fastboot erase boot_a") for the next 6
> > or so "failed" boots.
> >
>
> Yes this exact error.

The bootloader maintains a 'boot status' in one of the partition
attributes. After a certain amount of 'failed' boot , it will switch
to the other boot partition. It's the same thing on RB3/DB845c. In our
release for DB845c, we are patching the bootloader so that this
behavior is bypassed. On typical 'product' there is a user space
application that will come and set the partition attribute to indicate
the boot was successful.

For the record, this is the patch we use on 845c:
https://git.linaro.org/landing-teams/working/qualcomm/abl.git/commit/?h=release/LE.UM.2.3.7-09200-sda845.0&id=e3dc60213234ed626161a568ba587ddac63c5158

rebuilding EDK2/ABL requires access to signing tools.. so it might not
be possible for everyone. but in case you can, it should be
straightforward to reuse this patch.

>
>
> -Sai
>
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a
> member
> of Code Aurora Forum, hosted by The Linux Foundation
Sai Prakash Ranjan June 5, 2020, 2:39 p.m. UTC | #12
Hi Nico,

On 2020-06-05 20:01, Nicolas Dechesne wrote:
> On Fri, Jun 5, 2020 at 4:14 PM Sai Prakash Ranjan
> <saiprakash.ranjan@codeaurora.org> wrote:
>> 
>> On 2020-06-05 19:40, Jonathan Marek wrote:
>> > On 6/5/20 10:03 AM, Sai Prakash Ranjan wrote:
>> >> On 2020-05-29 08:45, Bjorn Andersson wrote:
>> >>> On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
>> >>>
>> >>>>
>> >>>>
>> >>>> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
>> >>>> > On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
>> >>>> >
>> >>>> > > Add the apps_smmu node for sm8150. Note that adding the iommus field for
>> >>>> > > UFS is required because initializing the iommu removes the bypass mapping
>> >>>> > > that created by the bootloader.
>> >>>> > >
>> >>>> >
>> >>>> > Unrelated to the patch itself; how do you disable the splash screen on
>> >>>> > 8150? "fastboot oem select-display-panel none" doesn't seem to work for
>> >>>> > me on the MTP - and hence this would prevent my device from booting.
>> >>>> >
>> >>>> > Thanks,
>> >>>> > Bjorn
>> >>>> >
>> >>>>
>> >>>> I don't have a MTP, but on HDK855, "fastboot oem
>> >>>> select-display-panel none"
>> >>>> combined with setting the physical switch to HDMI mode (which
>> >>>> switches off
>> >>>> the 1440x2560 panel) gets it to not setup the display at all (just
>> >>>> the
>> >>>> fastboot command isn't enough).
>> >>>>
>> >>>
>> >>> Okay, I don't think we have anything equivalent on the MTP, but good
>> >>> to
>> >>> know.
>> >>>
>> >>
>> >> Actually I tried out this in SM8150 MTP and it works fine for me,
>> >>
>> >> "fastboot set_active a; fastboot set_active b; fastboot set_active a;
>> >> fastboot oem select-display-panel none; fastboot reboot bootloader;
>> >> fastboot boot boot-sm8150.img"
>> >>
>> >> Also I need to switch slots everytime like above, otherwise I always
>> >> see some error
>> >> while loading the boot image.
>> >>
>> >
>> > What is the error? If it is "FAILED (remote: Failed to
>> > load/authenticate boot image: Load Error)" then flashing/erasing
>> > boot_a will make it go away ("fastboot erase boot_a") for the next 6
>> > or so "failed" boots.
>> >
>> 
>> Yes this exact error.
> 
> The bootloader maintains a 'boot status' in one of the partition
> attributes. After a certain amount of 'failed' boot , it will switch
> to the other boot partition. It's the same thing on RB3/DB845c. In our
> release for DB845c, we are patching the bootloader so that this
> behavior is bypassed. On typical 'product' there is a user space
> application that will come and set the partition attribute to indicate
> the boot was successful.
> 
> For the record, this is the patch we use on 845c:
> https://git.linaro.org/landing-teams/working/qualcomm/abl.git/commit/?h=release/LE.UM.2.3.7-09200-sda845.0&id=e3dc60213234ed626161a568ba587ddac63c5158
> 
> rebuilding EDK2/ABL requires access to signing tools.. so it might not
> be possible for everyone. but in case you can, it should be
> straightforward to reuse this patch.
> 

Thank you for these details and the patch, it's very useful.
I do have access to ABL code and the signing tools and can build one.

Thanks,
Sai
Nicolas Dechesne June 5, 2020, 2:51 p.m. UTC | #13
On Fri, Jun 5, 2020 at 4:39 PM Sai Prakash Ranjan
<saiprakash.ranjan@codeaurora.org> wrote:
>
> Hi Nico,
>
> On 2020-06-05 20:01, Nicolas Dechesne wrote:
> > On Fri, Jun 5, 2020 at 4:14 PM Sai Prakash Ranjan
> > <saiprakash.ranjan@codeaurora.org> wrote:
> >>
> >> On 2020-06-05 19:40, Jonathan Marek wrote:
> >> > On 6/5/20 10:03 AM, Sai Prakash Ranjan wrote:
> >> >> On 2020-05-29 08:45, Bjorn Andersson wrote:
> >> >>> On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
> >> >>>
> >> >>>>
> >> >>>>
> >> >>>> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
> >> >>>> > On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
> >> >>>> >
> >> >>>> > > Add the apps_smmu node for sm8150. Note that adding the iommus field for
> >> >>>> > > UFS is required because initializing the iommu removes the bypass mapping
> >> >>>> > > that created by the bootloader.
> >> >>>> > >
> >> >>>> >
> >> >>>> > Unrelated to the patch itself; how do you disable the splash screen on
> >> >>>> > 8150? "fastboot oem select-display-panel none" doesn't seem to work for
> >> >>>> > me on the MTP - and hence this would prevent my device from booting.
> >> >>>> >
> >> >>>> > Thanks,
> >> >>>> > Bjorn
> >> >>>> >
> >> >>>>
> >> >>>> I don't have a MTP, but on HDK855, "fastboot oem
> >> >>>> select-display-panel none"
> >> >>>> combined with setting the physical switch to HDMI mode (which
> >> >>>> switches off
> >> >>>> the 1440x2560 panel) gets it to not setup the display at all (just
> >> >>>> the
> >> >>>> fastboot command isn't enough).
> >> >>>>
> >> >>>
> >> >>> Okay, I don't think we have anything equivalent on the MTP, but good
> >> >>> to
> >> >>> know.
> >> >>>
> >> >>
> >> >> Actually I tried out this in SM8150 MTP and it works fine for me,
> >> >>
> >> >> "fastboot set_active a; fastboot set_active b; fastboot set_active a;
> >> >> fastboot oem select-display-panel none; fastboot reboot bootloader;
> >> >> fastboot boot boot-sm8150.img"
> >> >>
> >> >> Also I need to switch slots everytime like above, otherwise I always
> >> >> see some error
> >> >> while loading the boot image.
> >> >>
> >> >
> >> > What is the error? If it is "FAILED (remote: Failed to
> >> > load/authenticate boot image: Load Error)" then flashing/erasing
> >> > boot_a will make it go away ("fastboot erase boot_a") for the next 6
> >> > or so "failed" boots.
> >> >
> >>
> >> Yes this exact error.
> >
> > The bootloader maintains a 'boot status' in one of the partition
> > attributes. After a certain amount of 'failed' boot , it will switch
> > to the other boot partition. It's the same thing on RB3/DB845c. In our
> > release for DB845c, we are patching the bootloader so that this
> > behavior is bypassed. On typical 'product' there is a user space
> > application that will come and set the partition attribute to indicate
> > the boot was successful.
> >
> > For the record, this is the patch we use on 845c:
> > https://git.linaro.org/landing-teams/working/qualcomm/abl.git/commit/?h=release/LE.UM.2.3.7-09200-sda845.0&id=e3dc60213234ed626161a568ba587ddac63c5158
> >
> > rebuilding EDK2/ABL requires access to signing tools.. so it might not
> > be possible for everyone. but in case you can, it should be
> > straightforward to reuse this patch.
> >
>
> Thank you for these details and the patch, it's very useful.
> I do have access to ABL code and the signing tools and can build one.

Good. Then the next problem you will likely face is that building QCOM
ABL is far from being straightforward. Why would it be? ;)
That's the script we use to build it ourselves:
https://git.linaro.org/ci/job/configs.git/tree/lt-qcom-bootloader/dragonboard845c/builders.sh#n61

It has a reference to sectools which we have (internally) access to,
but you have it too, and you should be able to leverage most of the
script.

>
> Thanks,
> Sai
>
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a
> member
> of Code Aurora Forum, hosted by The Linux Foundation
Sai Prakash Ranjan June 5, 2020, 3:04 p.m. UTC | #14
On 2020-06-05 20:21, Nicolas Dechesne wrote:
> On Fri, Jun 5, 2020 at 4:39 PM Sai Prakash Ranjan
> <saiprakash.ranjan@codeaurora.org> wrote:
>> 
>> Hi Nico,
>> 
>> On 2020-06-05 20:01, Nicolas Dechesne wrote:
>> > On Fri, Jun 5, 2020 at 4:14 PM Sai Prakash Ranjan
>> > <saiprakash.ranjan@codeaurora.org> wrote:
>> >>
>> >> On 2020-06-05 19:40, Jonathan Marek wrote:
>> >> > On 6/5/20 10:03 AM, Sai Prakash Ranjan wrote:
>> >> >> On 2020-05-29 08:45, Bjorn Andersson wrote:
>> >> >>> On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
>> >> >>>
>> >> >>>>
>> >> >>>>
>> >> >>>> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
>> >> >>>> > On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
>> >> >>>> >
>> >> >>>> > > Add the apps_smmu node for sm8150. Note that adding the iommus field for
>> >> >>>> > > UFS is required because initializing the iommu removes the bypass mapping
>> >> >>>> > > that created by the bootloader.
>> >> >>>> > >
>> >> >>>> >
>> >> >>>> > Unrelated to the patch itself; how do you disable the splash screen on
>> >> >>>> > 8150? "fastboot oem select-display-panel none" doesn't seem to work for
>> >> >>>> > me on the MTP - and hence this would prevent my device from booting.
>> >> >>>> >
>> >> >>>> > Thanks,
>> >> >>>> > Bjorn
>> >> >>>> >
>> >> >>>>
>> >> >>>> I don't have a MTP, but on HDK855, "fastboot oem
>> >> >>>> select-display-panel none"
>> >> >>>> combined with setting the physical switch to HDMI mode (which
>> >> >>>> switches off
>> >> >>>> the 1440x2560 panel) gets it to not setup the display at all (just
>> >> >>>> the
>> >> >>>> fastboot command isn't enough).
>> >> >>>>
>> >> >>>
>> >> >>> Okay, I don't think we have anything equivalent on the MTP, but good
>> >> >>> to
>> >> >>> know.
>> >> >>>
>> >> >>
>> >> >> Actually I tried out this in SM8150 MTP and it works fine for me,
>> >> >>
>> >> >> "fastboot set_active a; fastboot set_active b; fastboot set_active a;
>> >> >> fastboot oem select-display-panel none; fastboot reboot bootloader;
>> >> >> fastboot boot boot-sm8150.img"
>> >> >>
>> >> >> Also I need to switch slots everytime like above, otherwise I always
>> >> >> see some error
>> >> >> while loading the boot image.
>> >> >>
>> >> >
>> >> > What is the error? If it is "FAILED (remote: Failed to
>> >> > load/authenticate boot image: Load Error)" then flashing/erasing
>> >> > boot_a will make it go away ("fastboot erase boot_a") for the next 6
>> >> > or so "failed" boots.
>> >> >
>> >>
>> >> Yes this exact error.
>> >
>> > The bootloader maintains a 'boot status' in one of the partition
>> > attributes. After a certain amount of 'failed' boot , it will switch
>> > to the other boot partition. It's the same thing on RB3/DB845c. In our
>> > release for DB845c, we are patching the bootloader so that this
>> > behavior is bypassed. On typical 'product' there is a user space
>> > application that will come and set the partition attribute to indicate
>> > the boot was successful.
>> >
>> > For the record, this is the patch we use on 845c:
>> > https://git.linaro.org/landing-teams/working/qualcomm/abl.git/commit/?h=release/LE.UM.2.3.7-09200-sda845.0&id=e3dc60213234ed626161a568ba587ddac63c5158
>> >
>> > rebuilding EDK2/ABL requires access to signing tools.. so it might not
>> > be possible for everyone. but in case you can, it should be
>> > straightforward to reuse this patch.
>> >
>> 
>> Thank you for these details and the patch, it's very useful.
>> I do have access to ABL code and the signing tools and can build one.
> 
> Good. Then the next problem you will likely face is that building QCOM
> ABL is far from being straightforward. Why would it be? ;)
> That's the script we use to build it ourselves:
> https://git.linaro.org/ci/job/configs.git/tree/lt-qcom-bootloader/dragonboard845c/builders.sh#n61
> 
> It has a reference to sectools which we have (internally) access to,
> but you have it too, and you should be able to leverage most of the
> script.

Looks like a cool tool, will definitely try it out :) Also internally we 
have another
tool to build ABL(if you are aware of kdev then you will know what this 
is called, guess ;))
which takes care of cloning and building and signing all the things 
required
(although very weirdly it clones sectools everytime which should be 
fixed, I just comment
that part out when I build) and all it takes is one command "make" :)

Thanks,
Sai
Jonathan Marek June 9, 2020, 7:52 p.m. UTC | #15
On 5/28/20 11:42 PM, Bjorn Andersson wrote:
> On Thu 28 May 20:34 PDT 2020, Jonathan Marek wrote:
> 
>> On 5/28/20 11:15 PM, Bjorn Andersson wrote:
>>> On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
>>>
>>>>
>>>>
>>>> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
>>>>> On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
>>>>>
>>>>>> Add the apps_smmu node for sm8150. Note that adding the iommus field for
>>>>>> UFS is required because initializing the iommu removes the bypass mapping
>>>>>> that created by the bootloader.
>>>>>>
>>>>>
>>>>> Unrelated to the patch itself; how do you disable the splash screen on
>>>>> 8150? "fastboot oem select-display-panel none" doesn't seem to work for
>>>>> me on the MTP - and hence this would prevent my device from booting.
>>>>>
>>>>> Thanks,
>>>>> Bjorn
>>>>>
>>>>
>>>> I don't have a MTP, but on HDK855, "fastboot oem select-display-panel none"
>>>> combined with setting the physical switch to HDMI mode (which switches off
>>>> the 1440x2560 panel) gets it to not setup the display at all (just the
>>>> fastboot command isn't enough).
>>>>
>>>
>>> Okay, I don't think we have anything equivalent on the MTP, but good to
>>> know.
>>>
>>>> With HDK865 though that doesn't work and I have a hack to work around it
>>>> (writing 0 to INTF_TIMING_ENGINE_EN early on in boot will stop video mode
>>>> scanout and it won't crash).
>>>>
>>>
>>> Then we need to sort this out in the arm-smmu driver before we can
>>> enable the apps_smmu node on 8250. I did receive some guidance from Will
>>> on the subject and have started looking into this.
>>>
>>
>> That's annoying because a lot depends on apps_mmu. GPU is an exception with
>> its own MMU but pretty much everything else uses apps_smmu (does it make
>> sense to add USB nodes if it won't work without apps_smmu?) Is this
>> something that will get resolved soon?
>>
> 
> We have a number of boards where this is becoming a critical issue, so
> we better find an acceptable solution to this very soon.
> 

I kept the sm8250 apps_smmu patch in V2:

I am now using a modified xbl with my HDK865, with a hack to make it use 
"none" for the display override string, and that allows me to use these 
patches without any kernel hack.

The "fastboot oem select-display-panel none" not working to disable 
bootloader enabled display definitely seems like a bug (I have not tried 
to debug it, but everything I've seen indicates that it should be 
disabling it). I don't think we should be holding this back based on a 
bootloader bug.

> Regards,
> Bjorn
> 
>> FWIW, I have another sm8250 board which does not need the workaround (its
>> bootloader does not set up the display). AFAIK modifying the bootloader to
>> not set up any display is a trivial modification (assuming that's an
>> option).
>>
>>> Thanks,
>>> Bjorn
>>>
>>>>>> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
>>>>>> ---
>>>>>>     arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 ++++++++++++++++++++++++++++
>>>>>>     1 file changed, 91 insertions(+)
>>>>>>
>>>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>>>> index a36512d1f6a1..acb839427b12 100644
>>>>>> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>>>> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>>>> @@ -442,6 +442,8 @@ ufs_mem_hc: ufshc@1d84000 {
>>>>>>     			resets = <&gcc GCC_UFS_PHY_BCR>;
>>>>>>     			reset-names = "rst";
>>>>>> +			iommus = <&apps_smmu 0x300 0>;
>>>>>> +
>>>>>>     			clock-names =
>>>>>>     				"core_clk",
>>>>>>     				"bus_aggr_clk",
>>>>>> @@ -706,6 +708,7 @@ usb_1_dwc3: dwc3@a600000 {
>>>>>>     				compatible = "snps,dwc3";
>>>>>>     				reg = <0 0x0a600000 0 0xcd00>;
>>>>>>     				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>>>>>> +				iommus = <&apps_smmu 0x140 0>;
>>>>>>     				snps,dis_u2_susphy_quirk;
>>>>>>     				snps,dis_enblslpm_quirk;
>>>>>>     				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
>>>>>> @@ -742,6 +745,94 @@ spmi_bus: spmi@c440000 {
>>>>>>     			cell-index = <0>;
>>>>>>     		};
>>>>>> +		apps_smmu: iommu@15000000 {
>>>>>> +			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
>>>>>> +			reg = <0 0x15000000 0 0x100000>;
>>>>>> +			#iommu-cells = <2>;
>>>>>> +			#global-interrupts = <1>;
>>>>>> +			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
>>>>>> +		};
>>>>>> +
>>>>>>     		remoteproc_adsp: remoteproc@17300000 {
>>>>>>     			compatible = "qcom,sm8150-adsp-pas";
>>>>>>     			reg = <0x0 0x17300000 0x0 0x4040>;
>>>>>> -- 
>>>>>> 2.26.1
>>>>>>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index a36512d1f6a1..acb839427b12 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -442,6 +442,8 @@  ufs_mem_hc: ufshc@1d84000 {
 			resets = <&gcc GCC_UFS_PHY_BCR>;
 			reset-names = "rst";
 
+			iommus = <&apps_smmu 0x300 0>;
+
 			clock-names =
 				"core_clk",
 				"bus_aggr_clk",
@@ -706,6 +708,7 @@  usb_1_dwc3: dwc3@a600000 {
 				compatible = "snps,dwc3";
 				reg = <0 0x0a600000 0 0xcd00>;
 				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+				iommus = <&apps_smmu 0x140 0>;
 				snps,dis_u2_susphy_quirk;
 				snps,dis_enblslpm_quirk;
 				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
@@ -742,6 +745,94 @@  spmi_bus: spmi@c440000 {
 			cell-index = <0>;
 		};
 
+		apps_smmu: iommu@15000000 {
+			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
+			reg = <0 0x15000000 0 0x100000>;
+			#iommu-cells = <2>;
+			#global-interrupts = <1>;
+			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		remoteproc_adsp: remoteproc@17300000 {
 			compatible = "qcom,sm8150-adsp-pas";
 			reg = <0x0 0x17300000 0x0 0x4040>;