| Message ID | 20200902183852.14510-2-jonathan@marek.ca (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | SM8150 and SM8250 dispcc drivers | expand |
On Wed, 02 Sep 2020 14:38:41 -0400, Jonathan Marek wrote: > This makes it easier to combine dt bindings for sdm845/sc7180 dispcc. > > Note: nothing upstream provides these clocks and the sdm845 dispcc driver > hasn't switched to using .fw_name for these clocks (these properties are > ignored), so changing this shouldn't be a problem. > > Signed-off-by: Jonathan Marek <jonathan@marek.ca> > --- > .../devicetree/bindings/clock/qcom,sdm845-dispcc.yaml | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > My bot found errors running 'make dt_binding_check' on your patch: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.example.dt.yaml: clock-controller@af00000: clock-names:7: 'dp_phy_pll_link_clk' was expected From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.example.dt.yaml: clock-controller@af00000: clock-names:8: 'dp_phy_pll_vco_div_clk' was expected From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml See https://patchwork.ozlabs.org/patch/1356040 If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure dt-schema is up to date: pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade Please check and re-submit.
diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml index 4a3be733d042..3825dd6e67e3 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml @@ -43,8 +43,8 @@ properties: - const: dsi0_phy_pll_out_dsiclk - const: dsi1_phy_pll_out_byteclk - const: dsi1_phy_pll_out_dsiclk - - const: dp_link_clk_divsel_ten - - const: dp_vco_divided_clk_src_mux + - const: dp_phy_pll_link_clk + - const: dp_phy_pll_vco_div_clk '#clock-cells': const: 1
This makes it easier to combine dt bindings for sdm845/sc7180 dispcc. Note: nothing upstream provides these clocks and the sdm845 dispcc driver hasn't switched to using .fw_name for these clocks (these properties are ignored), so changing this shouldn't be a problem. Signed-off-by: Jonathan Marek <jonathan@marek.ca> --- .../devicetree/bindings/clock/qcom,sdm845-dispcc.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)