diff mbox series

[05/14] arm64: dts: qcom: msm8916: Use IRQ defines, add IRQ types

Message ID 20200915071221.72895-6-stephan@gerhold.net (mailing list archive)
State Accepted
Commit dd5f6c73240756abb0dd457d7c885564167e9f0a
Headers show
Series Cleanup & sort msm8916.dtsi, various minor fixes | expand

Commit Message

Stephan Gerhold Sept. 15, 2020, 7:12 a.m. UTC
dt-bindings/interrupt-controller/arm-gic.h has a GIC_SPI define
that allows specifying interrupts more clearly, but right now only
some device nodes in msm8916.dtsi make use of it.
Convert all others to use it.

The same applies to the IRQ_TYPE_* defines in
dt-bindings/interrupt-controller/irq.h. Some interrupts were defined
with raw numbers, or even with IRQ_TYPE_NONE (0).
Convert all these to use appropriate IRQ types.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 38 ++++++++++++++-------------
 1 file changed, 20 insertions(+), 18 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 1f9a24a2464e..003451ccf3ee 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -737,7 +737,7 @@  lpass: lpass@7708000 {
 					"mi2s-bit-clk3";
 			#sound-dai-cells = <1>;
 
-			interrupts = <0 160 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "lpass-irq-lpaif";
 			reg = <0x07708000 0x10000>;
 			reg-names = "lpass-lpaif";
@@ -760,7 +760,8 @@  sdhc_1: sdhci@7824000 {
 			reg = <0x07824900 0x11c>, <0x07824000 0x800>;
 			reg-names = "hc_mem", "core_mem";
 
-			interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>, <0 138 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "hc_irq", "pwr_irq";
 			clocks = <&gcc GCC_SDCC1_APPS_CLK>,
 				 <&gcc GCC_SDCC1_AHB_CLK>,
@@ -777,7 +778,8 @@  sdhc_2: sdhci@7864000 {
 			reg = <0x07864900 0x11c>, <0x07864000 0x800>;
 			reg-names = "hc_mem", "core_mem";
 
-			interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>, <0 221 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "hc_irq", "pwr_irq";
 			clocks = <&gcc GCC_SDCC2_APPS_CLK>,
 				 <&gcc GCC_SDCC2_AHB_CLK>,
@@ -1053,7 +1055,7 @@  mdss: mdss@1a00000 {
 				      "bus",
 				      "vsync";
 
-			interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 
 			interrupt-controller;
 			#interrupt-cells = <1>;
@@ -1170,11 +1172,11 @@  mpss: hexagon@4080000 {
 
 			reg-names = "qdsp6", "rmb";
 
-			interrupts-extended = <&intc 0 24 1>,
-					      <&hexagon_smp2p_in 0 0>,
-					      <&hexagon_smp2p_in 1 0>,
-					      <&hexagon_smp2p_in 2 0>,
-					      <&hexagon_smp2p_in 3 0>;
+			interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
+					      <&hexagon_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+					      <&hexagon_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+					      <&hexagon_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+					      <&hexagon_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
 			interrupt-names = "wdog", "fatal", "ready",
 					  "handover", "stop-ack";
 
@@ -1203,7 +1205,7 @@  mpss {
 			};
 
 			smd-edge {
-				interrupts = <0 25 IRQ_TYPE_EDGE_RISING>;
+				interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>;
 
 				qcom,smd-edge = <0>;
 				qcom,ipc = <&apcs 8 12>;
@@ -1234,7 +1236,7 @@  pronto: wcnss@a21b000 {
 
 			memory-region = <&wcnss_mem>;
 
-			interrupts-extended = <&intc 0 149 IRQ_TYPE_EDGE_RISING>,
+			interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
 					      <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
 					      <&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
 					      <&wcnss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
@@ -1257,7 +1259,7 @@  iris {
 			};
 
 			smd-edge {
-				interrupts = <0 142 1>;
+				interrupts = <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>;
 
 				qcom,ipc = <&apcs 8 17>;
 				qcom,smd-edge = <6>;
@@ -1278,8 +1280,8 @@  bt {
 					wifi {
 						compatible = "qcom,wcnss-wlan";
 
-						interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>,
-							     <0 146 IRQ_TYPE_LEVEL_HIGH>;
+						interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+							     <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 						interrupt-names = "tx", "rx";
 
 						qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
@@ -1836,7 +1838,7 @@  hexagon-smp2p {
 		compatible = "qcom,smp2p";
 		qcom,smem = <435>, <428>;
 
-		interrupts = <0 27 IRQ_TYPE_EDGE_RISING>;
+		interrupts = <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>;
 
 		qcom,ipc = <&apcs 8 14>;
 
@@ -1861,7 +1863,7 @@  wcnss-smp2p {
 		compatible = "qcom,smp2p";
 		qcom,smem = <451>, <431>;
 
-		interrupts = <0 143 IRQ_TYPE_EDGE_RISING>;
+		interrupts = <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>;
 
 		qcom,ipc = <&apcs 8 18>;
 
@@ -1899,7 +1901,7 @@  apps_smsm: apps@0 {
 
 		hexagon_smsm: hexagon@1 {
 			reg = <1>;
-			interrupts = <0 26 IRQ_TYPE_EDGE_RISING>;
+			interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
 
 			interrupt-controller;
 			#interrupt-cells = <2>;
@@ -1907,7 +1909,7 @@  hexagon_smsm: hexagon@1 {
 
 		wcnss_smsm: wcnss@6 {
 			reg = <6>;
-			interrupts = <0 144 IRQ_TYPE_EDGE_RISING>;
+			interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>;
 
 			interrupt-controller;
 			#interrupt-cells = <2>;