diff mbox series

[6/7] drm/msm/a5xx: Disable flat shading optimization

Message ID 20200926125146.12859-7-kholk11@gmail.com (mailing list archive)
State Superseded
Headers show
Series Add support for Adreno 508/509/512 | expand

Commit Message

AngeloGioacchino Del Regno Sept. 26, 2020, 12:51 p.m. UTC
From: Konrad Dybcio <konradybcio@gmail.com>

Port over the command from downstream to prevent undefined
behaviour.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
---
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Rob Clark Sept. 27, 2020, 6:56 p.m. UTC | #1
On Sat, Sep 26, 2020 at 5:52 AM <kholk11@gmail.com> wrote:
>
> From: Konrad Dybcio <konradybcio@gmail.com>
>
> Port over the command from downstream to prevent undefined
> behaviour.
>
> Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
> Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
> ---
>  drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> index b2670af638a3..bdc852e7d979 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> @@ -759,6 +759,9 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
>             adreno_is_a540(adreno_gpu))
>                 gpu_write(gpu, REG_A5XX_UCHE_DBG_ECO_CNTL_2, bit);
>
> +       /* Disable All flat shading optimization */
> +       gpu_rmw(gpu, 0x00000E60, 0, 0x1 << 10);

Looks like VPC_DBG_ECO_CNTL.ALLFLATOPTDIS (based on downstream
41582a1f24d2961094c556db788028b433d8476a)

BR,
-R

> +
>         /* Protect registers from the CP */
>         gpu_write(gpu, REG_A5XX_CP_PROTECT_CNTL, 0x00000007);
>
> --
> 2.28.0
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index b2670af638a3..bdc852e7d979 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -759,6 +759,9 @@  static int a5xx_hw_init(struct msm_gpu *gpu)
 	    adreno_is_a540(adreno_gpu))
 		gpu_write(gpu, REG_A5XX_UCHE_DBG_ECO_CNTL_2, bit);
 
+	/* Disable All flat shading optimization */
+	gpu_rmw(gpu, 0x00000E60, 0, 0x1 << 10);
+
 	/* Protect registers from the CP */
 	gpu_write(gpu, REG_A5XX_CP_PROTECT_CNTL, 0x00000007);