| Message ID | 20201028190955.1264526-1-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | c4cf0300be84c2233ffa1b7516be66b167bc81f5 |
| Headers | show |
| Series | [1/2] arm64: dts: qcom: sm8250: Add support for SDC2 | expand |
Hello: This series was applied to qcom/linux.git (refs/heads/for-next): On Wed, 28 Oct 2020 22:09:54 +0300 you wrote: > From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > Add support for SDC2 which can be used to interface uSD card. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > [DB: minor fixes: clocks, iommus, opps] > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > [...] Here is the summary with links: - [1/2] arm64: dts: qcom: sm8250: Add support for SDC2 https://git.kernel.org/qcom/c/c4cf0300be84 - [2/2] arm64: dts: qcom: rb5: Add support for uSD card https://git.kernel.org/qcom/c/53a8ccf1c7e5 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 457c3e65c0b6..2de4a9f808d5 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1462,6 +1462,51 @@ IPCC_MPROC_SIGNAL_GLINK_QMP }; }; + sdhc_2: sdhci@8804000 { + compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"; + reg = <0 0x08804000 0 0x1000>; + + interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC2_AHB_CLK>, + <&gcc GCC_SDCC2_APPS_CLK>, + <&xo_board>; + clock-names = "iface", "core", "xo"; + iommus = <&apps_smmu 0x4a0 0x0>; + qcom,dll-config = <0x0007642c>; + qcom,ddr-config = <0x80040868>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&sdhc2_opp_table>; + + status = "disabled"; + + sdhc2_opp_table: sdhc2-opp-table { + compatible = "operating-points-v2"; + + opp-19200000 { + opp-hz = /bits/ 64 <19200000>; + required-opps = <&rpmhpd_opp_min_svs>; + }; + + opp-50000000 { + opp-hz = /bits/ 64 <50000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-202000000 { + opp-hz = /bits/ 64 <202000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + }; + }; + dc_noc: interconnect@90c0000 { compatible = "qcom,sm8250-dc-noc"; reg = <0 0x090c0000 0 0x4200>;