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Tue, 05 Jan 2021 01:46:50 -0800 (PST) From: Manivannan Sadhasivam To: agross@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Vinod Koul , Manivannan Sadhasivam Subject: [PATCH 02/18] ARM: dts: qcom: sdx55: Add reserved memory nodes Date: Tue, 5 Jan 2021 15:16:20 +0530 Message-Id: <20210105094636.10301-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210105094636.10301-1-manivannan.sadhasivam@linaro.org> References: <20210105094636.10301-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Vinod Koul This adds reserved memory nodes to the SDX55 dtsi as defined by v8 of the memory map Signed-off-by: Vinod Koul Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/qcom-sdx55.dtsi | 67 +++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index 08b4a40338fa..eeb6bf392f93 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -60,6 +60,73 @@ psci { method = "smc"; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mpss_debug_mem: memory@8ef00000 { + no-map; + reg = <0x8ef00000 0x800000>; + }; + + hyp_mem: memory@8fc00000 { + no-map; + reg = <0x8fc00000 0x80000>; + }; + + ac_db_mem: memory@8fc80000 { + no-map; + reg = <0x8fc80000 0x40000>; + }; + + secdata_mem: memory@8fcfd000 { + no-map; + reg = <0x8fcfd000 0x1000>; + }; + + ipa_fw_mem: memory@8fced000 { + no-map; + reg = <0x8fced000 0x10000>; + }; + + sbl_mem: memory@8fd00000 { + no-map; + reg = <0x8fd00000 0x100000>; + }; + + aop_image: memory@8fe00000 { + no-map; + reg = <0x8fe00000 0x20000>; + }; + + aop_cmd_db: memory@8fe20000 { + compatible = "qcom,cmd-db"; + reg = <0x8fe20000 0x20000>; + no-map; + }; + + smem_mem: memory@8fe40000 { + no-map; + reg = <0x8fe40000 0xc0000>; + }; + + tz_mem: memory@8ff00000 { + no-map; + reg = <0x8ff00000 0x100000>; + }; + + tz_apps_mem: memory@0x90000000 { + no-map; + reg = <0x90000000 0x500000>; + }; + + mpss_adsp_mem: memory@90800000 { + no-map; + reg = <0x90800000 0xf800000>; + }; + }; + soc: soc { #address-cells = <1>; #size-cells = <1>;