From patchwork Wed Jan 20 13:43:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Foss X-Patchwork-Id: 12033737 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE68CC4321A for ; Wed, 20 Jan 2021 21:09:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AFADC235F7 for ; Wed, 20 Jan 2021 21:09:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733013AbhATU4o (ORCPT ); Wed, 20 Jan 2021 15:56:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44616 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729550AbhATNxP (ORCPT ); Wed, 20 Jan 2021 08:53:15 -0500 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE1FCC061362 for ; Wed, 20 Jan 2021 05:45:06 -0800 (PST) Received: by mail-wr1-x435.google.com with SMTP id a12so23130204wrv.8 for ; Wed, 20 Jan 2021 05:45:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Ti5QbjgTWhPMj8a+GyYtZ6e3/Vy03vvGfKc1MEqHJoA=; b=shXRNgMH1yZabTLoYeK62q9zJLEStprNmRNn1sCOQK+Xsv5O7jPMMzf9lc1wmTpVjp OY0TcYDW6uNKMnU5DT0BIXktUUI0cxV0szJpyt1bNDpYfYdvAVzkowKw2Wj/eBrHzSmF NLqMjpGfvHjWzkQTemc4VT+TMJHkABdcL/MnJwPAvCpCPbRlQPrQCNAeyqlXhtmicNWP Au0hOtVUQXmTDcNg7Tg0xztt0+aBuxAM/AMJ+X9UuXR/yNClOpDnLQ/IU0l7fr8Ls0HN g8IF0X8a5fOrjZIj1ov8GNDco+vQrzTcl6sW2s+OBKGqoOXdgbW+XBBxVMiYVDCntL5F ptEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Ti5QbjgTWhPMj8a+GyYtZ6e3/Vy03vvGfKc1MEqHJoA=; b=Ruzgmx8uacThTQy0xXpiYUSSkoAEZd9LCdWCTufalGjp9RRM+b4QIxnBLg40pbXWX/ je2/BAxZfqmZ6xOQlkrq1GUIxxviT6aFN1IXHODtphRGNc0MnEuIAO4V+zkN9nhY6zjb P/SUcRYL0Le5eNzIfbE5YJRonifA6VpcvAq0KSBsszSc8e9vQnGa1vNPirlUxcdZwPk7 qYkfvgK08n6Wwn3fCfrV2Ih+PxCKlTKOQct8oVra6feDCfGBxPEt3pJBDzGCvP3llwmu 69NsRR70KxgbXIExRLDLHkTjElIs2zLcvEZ8kEUkLLKRtG1LODCfJ1DrTzi5Ww+b8QiY L2VQ== X-Gm-Message-State: AOAM532nfRkZEfW0HIaCqKZ8VXo+vgpUi0ad8UTKx4IH2K93nK7OlGJt 8+c0uYoCaFmP0UdVGs6giTPWNg== X-Google-Smtp-Source: ABdhPJygKGnqxGkoQ6w9iFnphjwrBiAOjFt2Pbrq1Iz1UmA6e3mt0hXHFBSArAicMmTyce08t2LpzA== X-Received: by 2002:adf:dc8d:: with SMTP id r13mr9362058wrj.325.1611150305483; Wed, 20 Jan 2021 05:45:05 -0800 (PST) Received: from localhost.localdomain ([2a02:2450:102f:d6a:93b3:1f80:ae7b:a5c6]) by smtp.gmail.com with ESMTPSA id t67sm4224075wmt.28.2021.01.20.05.45.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jan 2021 05:45:04 -0800 (PST) From: Robert Foss To: agross@kernel.org, bjorn.andersson@linaro.org, robert.foss@linaro.org, todor.too@gmail.com, mchehab@kernel.org, robh+dt@kernel.org, catalin.marinas@arm.com, will@kernel.org, shawnguo@kernel.org, leoyang.li@nxp.com, geert+renesas@glider.be, vkoul@kernel.org, Anson.Huang@nxp.com, michael@walle.cc, agx@sigxcpu.org, max.oss.09@gmail.com, linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno , Andrey Konovalov , Laurent Pinchart Cc: Tomasz Figa , Azam Sadiq Pasha Kapatrala Syed , Sarvesh Sridutt , Jonathan Marek Subject: [PATCH v2 20/22] arm64: dts: sdm845: Add CAMSS ISP node Date: Wed, 20 Jan 2021 14:43:55 +0100 Message-Id: <20210120134357.1522254-20-robert.foss@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210120134357.1522254-1-robert.foss@linaro.org> References: <20210120134357.1522254-1-robert.foss@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the camss dt node for sdm845. Signed-off-by: Robert Foss --- Changes since v1 - Laurent: Fix subject - Laurent: Remove redundant regulator labels - Laurent: Remove empty line arch/arm64/boot/dts/qcom/sdm845.dtsi | 130 +++++++++++++++++++++++++++ 1 file changed, 130 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index bcf888381f14..1ead2c77d068 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -3911,6 +3911,136 @@ videocc: clock-controller@ab00000 { #reset-cells = <1>; }; + camss: camss@a00000 { + compatible = "qcom,sdm845-camss"; + reg = <0 0xacb3000 0 0x1000>, + <0 0xacba000 0 0x1000>, + <0 0xacc8000 0 0x1000>, + <0 0xac65000 0 0x1000>, + <0 0xac66000 0 0x1000>, + <0 0xac67000 0 0x1000>, + <0 0xac68000 0 0x1000>, + <0 0xacaf000 0 0x4000>, + <0 0xacb6000 0 0x4000>, + <0 0xacc4000 0 0x4000>; + reg-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "vfe0", + "vfe1", + "vfe_lite"; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "vfe0", + "vfe1", + "vfe_lite"; + power-domains = <&clock_camcc IFE_0_GDSC>, + <&clock_camcc IFE_1_GDSC>, + <&clock_camcc TITAN_TOP_GDSC>; + clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_0_CSID_CLK>, + <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_1_CSID_CLK>, + <&clock_camcc CAM_CC_IFE_1_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY0_CLK>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY1_CLK>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY2_CLK>, + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY3_CLK>, + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>, + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_AXI_CLK>, + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&clock_camcc CAM_CC_SOC_AHB_CLK>, + <&clock_camcc CAM_CC_IFE_0_AXI_CLK>, + <&clock_camcc CAM_CC_IFE_0_CLK>, + <&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_1_AXI_CLK>, + <&clock_camcc CAM_CC_IFE_1_CLK>, + <&clock_camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_1_CLK_SRC>, + <&clock_camcc CAM_CC_IFE_LITE_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>; + clock-names = "camnoc_axi", + "cpas_ahb", + "cphy_rx_src", + "csi0", + "csi0_src", + "csi1", + "csi1_src", + "csi2", + "csi2_src", + "csiphy0", + "csiphy0_timer", + "csiphy0_timer_src", + "csiphy1", + "csiphy1_timer", + "csiphy1_timer_src", + "csiphy2", + "csiphy2_timer", + "csiphy2_timer_src", + "csiphy3", + "csiphy3_timer", + "csiphy3_timer_src", + "gcc_camera_ahb", + "gcc_camera_axi", + "slow_ahb_src", + "soc_ahb", + "vfe0_axi", + "vfe0", + "vfe0_cphy_rx", + "vfe0_src", + "vfe1_axi", + "vfe1", + "vfe1_cphy_rx", + "vfe1_src", + "vfe_lite", + "vfe_lite_cphy_rx", + "vfe_lite_src"; + + iommus = <&apps_smmu 0x0808 0x0>, + <&apps_smmu 0x0810 0x8>, + <&apps_smmu 0x0c08 0x0>, + <&apps_smmu 0x0c10 0x8>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + cci: cci@ac4a000 { compatible = "qcom,sdm845-cci"; #address-cells = <1>;