| Message ID | 20210519143700.27392-9-bhupesh.sharma@linaro.org (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | Enable Qualcomm Crypto Engine on sm8250 | expand |
On Wed, May 19, 2021 at 08:06:51PM +0530, Bhupesh Sharma wrote: > Newer qcom chips support newer versions of the qce crypto IP, so add > soc specific compatible strings for qcom-qce instead of using crypto > IP version specific ones. > > Cc: Thara Gopinath <thara.gopinath@linaro.org> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Andy Gross <agross@kernel.org> > Cc: Herbert Xu <herbert@gondor.apana.org.au> > Cc: David S. Miller <davem@davemloft.net> > Cc: Stephen Boyd <sboyd@kernel.org> > Cc: Michael Turquette <mturquette@baylibre.com> > Cc: Vinod Koul <vkoul@kernel.org> > Cc: dmaengine@vger.kernel.org > Cc: linux-clk@vger.kernel.org > Cc: linux-crypto@vger.kernel.org > Cc: devicetree@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: bhupesh.linux@gmail.com > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > --- > Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml > index 4be9ce697123..7722ac9529bf 100644 > --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml > +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml > @@ -15,7 +15,12 @@ description: | > > properties: > compatible: > - const: qcom,crypto-v5.1 You can't get rid of the old one. > + enum: > + - qcom,ipq6018-qce > + - qcom,sdm845-qce > + - qcom,sm8150-qce > + - qcom,sm8250-qce > + - qcom,sm8350-qce > > reg: > maxItems: 1 > @@ -71,7 +76,7 @@ examples: > - | > #include <dt-bindings/clock/qcom,gcc-apq8084.h> > crypto-engine@fd45a000 { > - compatible = "qcom,crypto-v5.1"; > + compatible = "qcom,ipq6018-qce"; > reg = <0xfd45a000 0x6000>; > clocks = <&gcc GCC_CE2_AHB_CLK>, > <&gcc GCC_CE2_AXI_CLK>, > -- > 2.31.1 >
Hi Rob, On Fri, 21 May 2021 at 07:16, Rob Herring <robh@kernel.org> wrote: > > On Wed, May 19, 2021 at 08:06:51PM +0530, Bhupesh Sharma wrote: > > Newer qcom chips support newer versions of the qce crypto IP, so add > > soc specific compatible strings for qcom-qce instead of using crypto > > IP version specific ones. > > > > Cc: Thara Gopinath <thara.gopinath@linaro.org> > > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > > Cc: Rob Herring <robh+dt@kernel.org> > > Cc: Andy Gross <agross@kernel.org> > > Cc: Herbert Xu <herbert@gondor.apana.org.au> > > Cc: David S. Miller <davem@davemloft.net> > > Cc: Stephen Boyd <sboyd@kernel.org> > > Cc: Michael Turquette <mturquette@baylibre.com> > > Cc: Vinod Koul <vkoul@kernel.org> > > Cc: dmaengine@vger.kernel.org > > Cc: linux-clk@vger.kernel.org > > Cc: linux-crypto@vger.kernel.org > > Cc: devicetree@vger.kernel.org > > Cc: linux-kernel@vger.kernel.org > > Cc: bhupesh.linux@gmail.com > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > > --- > > Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 9 +++++++-- > > 1 file changed, 7 insertions(+), 2 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml > > index 4be9ce697123..7722ac9529bf 100644 > > --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml > > +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml > > @@ -15,7 +15,12 @@ description: | > > > > properties: > > compatible: > > - const: qcom,crypto-v5.1 > > You can't get rid of the old one. Ok, I will fix it in v4. Thanks, Bhupesh > > + enum: > > + - qcom,ipq6018-qce > > + - qcom,sdm845-qce > > + - qcom,sm8150-qce > > + - qcom,sm8250-qce > > + - qcom,sm8350-qce > > > > reg: > > maxItems: 1 > > @@ -71,7 +76,7 @@ examples: > > - | > > #include <dt-bindings/clock/qcom,gcc-apq8084.h> > > crypto-engine@fd45a000 { > > - compatible = "qcom,crypto-v5.1"; > > + compatible = "qcom,ipq6018-qce"; > > reg = <0xfd45a000 0x6000>; > > clocks = <&gcc GCC_CE2_AHB_CLK>, > > <&gcc GCC_CE2_AXI_CLK>, > > -- > > 2.31.1 > >
diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml index 4be9ce697123..7722ac9529bf 100644 --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml @@ -15,7 +15,12 @@ description: | properties: compatible: - const: qcom,crypto-v5.1 + enum: + - qcom,ipq6018-qce + - qcom,sdm845-qce + - qcom,sm8150-qce + - qcom,sm8250-qce + - qcom,sm8350-qce reg: maxItems: 1 @@ -71,7 +76,7 @@ examples: - | #include <dt-bindings/clock/qcom,gcc-apq8084.h> crypto-engine@fd45a000 { - compatible = "qcom,crypto-v5.1"; + compatible = "qcom,ipq6018-qce"; reg = <0xfd45a000 0x6000>; clocks = <&gcc GCC_CE2_AHB_CLK>, <&gcc GCC_CE2_AXI_CLK>,
Newer qcom chips support newer versions of the qce crypto IP, so add soc specific compatible strings for qcom-qce instead of using crypto IP version specific ones. Cc: Thara Gopinath <thara.gopinath@linaro.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Andy Gross <agross@kernel.org> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: David S. Miller <davem@davemloft.net> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Vinod Koul <vkoul@kernel.org> Cc: dmaengine@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-crypto@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: bhupesh.linux@gmail.com Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> --- Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)