Message ID | 20210617053432.350486-2-bhupesh.sharma@linaro.org (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | pinctrl: qcom/pinctrl-spmi-gpio: Add support for pmic-gpio on SA8155p-adp | expand |
On Thu 17 Jun 00:34 CDT 2021, Bhupesh Sharma wrote: > Arrange the compatibles inside qcom-pmic gpio device tree > bindings alphabetically. > > While at it, also make some minor cosmetic changes to allow > future compatible addition to the bindings simpler. > I think we're rather close to getting the YAML binding sorted out, but this patch does look good and doesn't hurt. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > Cc: Linus Walleij <linus.walleij@linaro.org> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > --- > .../bindings/pinctrl/qcom,pmic-gpio.txt | 58 +++++++++---------- > 1 file changed, 29 insertions(+), 29 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt > index f6a9760558a6..10f049e21264 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt > @@ -7,10 +7,20 @@ PMIC's from Qualcomm. > Usage: required > Value type: <string> > Definition: must be one of: > + "qcom,pm660-gpio" > + "qcom,pm660l-gpio" > + "qcom,pm6150-gpio" > + "qcom,pm6150l-gpio" > "qcom,pm8005-gpio" > + "qcom,pm8008-gpio" > "qcom,pm8018-gpio" > "qcom,pm8038-gpio" > "qcom,pm8058-gpio" > + "qcom,pm8150-gpio" > + "qcom,pm8150b-gpio" > + "qcom,pm8350-gpio" > + "qcom,pm8350b-gpio" > + "qcom,pm8350c-gpio" > "qcom,pm8916-gpio" > "qcom,pm8917-gpio" > "qcom,pm8921-gpio" > @@ -22,20 +32,10 @@ PMIC's from Qualcomm. > "qcom,pmi8950-gpio" > "qcom,pmi8994-gpio" > "qcom,pmi8998-gpio" > - "qcom,pms405-gpio" > - "qcom,pm660-gpio" > - "qcom,pm660l-gpio" > - "qcom,pm8150-gpio" > - "qcom,pm8150b-gpio" > - "qcom,pm8350-gpio" > - "qcom,pm8350b-gpio" > - "qcom,pm8350c-gpio" > "qcom,pmk8350-gpio" > "qcom,pmr735a-gpio" > "qcom,pmr735b-gpio" > - "qcom,pm6150-gpio" > - "qcom,pm6150l-gpio" > - "qcom,pm8008-gpio" > + "qcom,pms405-gpio" > "qcom,pmx55-gpio" > > And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio" > @@ -97,34 +97,34 @@ to specify in a pin configuration subnode: > Value type: <string-array> > Definition: List of gpio pins affected by the properties specified in > this subnode. Valid pins are: > - gpio1-gpio4 for pm8005 > - gpio1-gpio6 for pm8018 > + gpio1-gpio10 for pm6150 > + gpio1-gpio12 for pm6150l > + gpio1-gpio4 for pm8005 > + gpio1-gpio2 for pm8008 > + gpio1-gpio6 for pm8018 > gpio1-gpio12 for pm8038 > gpio1-gpio40 for pm8058 > - gpio1-gpio4 for pm8916 > + gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7 > + and gpio8) > + gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7) > + gpio1-gpio12 for pm8150l (hole on gpio7) > + gpio1-gpio10 for pm8350 > + gpio1-gpio8 for pm8350b > + gpio1-gpio9 for pm8350c > + gpio1-gpio4 for pm8916 > gpio1-gpio38 for pm8917 > gpio1-gpio44 for pm8921 > gpio1-gpio36 for pm8941 > - gpio1-gpio8 for pm8950 (hole on gpio3) > + gpio1-gpio8 for pm8950 (hole on gpio3) > gpio1-gpio22 for pm8994 > gpio1-gpio26 for pm8998 > gpio1-gpio22 for pma8084 > - gpio1-gpio2 for pmi8950 > + gpio1-gpio2 for pmi8950 > gpio1-gpio10 for pmi8994 > + gpio1-gpio4 for pmk8350 > + gpio1-gpio4 for pmr735a > + gpio1-gpio4 for pmr735b > gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10) > - gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7 > - and gpio8) > - gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7) > - gpio1-gpio12 for pm8150l (hole on gpio7) > - gpio1-gpio10 for pm8350 > - gpio1-gpio8 for pm8350b > - gpio1-gpio9 for pm8350c > - gpio1-gpio4 for pmk8350 > - gpio1-gpio4 for pmr735a > - gpio1-gpio4 for pmr735b > - gpio1-gpio10 for pm6150 > - gpio1-gpio12 for pm6150l > - gpio1-gpio2 for pm8008 > gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10 > and gpio11) > > -- > 2.31.1 >
On Thu, 17 Jun 2021 11:04:29 +0530, Bhupesh Sharma wrote: > Arrange the compatibles inside qcom-pmic gpio device tree > bindings alphabetically. > > While at it, also make some minor cosmetic changes to allow > future compatible addition to the bindings simpler. > > Cc: Linus Walleij <linus.walleij@linaro.org> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > --- > .../bindings/pinctrl/qcom,pmic-gpio.txt | 58 +++++++++---------- > 1 file changed, 29 insertions(+), 29 deletions(-) > Acked-by: Rob Herring <robh@kernel.org>
On Thu, Jun 17, 2021 at 7:34 AM Bhupesh Sharma <bhupesh.sharma@linaro.org> wrote: > Arrange the compatibles inside qcom-pmic gpio device tree > bindings alphabetically. > > While at it, also make some minor cosmetic changes to allow > future compatible addition to the bindings simpler. > > Cc: Linus Walleij <linus.walleij@linaro.org> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> These patches do not apply on the current devel branch in the pin control tree: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/log/?h=devel Please rebase and resend! Yours, Linus Walleij
Hi Linus, On Sat, 26 Jun 2021 at 05:21, Linus Walleij <linus.walleij@linaro.org> wrote: > > On Thu, Jun 17, 2021 at 7:34 AM Bhupesh Sharma > <bhupesh.sharma@linaro.org> wrote: > > > Arrange the compatibles inside qcom-pmic gpio device tree > > bindings alphabetically. > > > > While at it, also make some minor cosmetic changes to allow > > future compatible addition to the bindings simpler. > > > > Cc: Linus Walleij <linus.walleij@linaro.org> > > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > > These patches do not apply on the current devel branch in the pin control > tree: > https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/log/?h=devel > > Please rebase and resend! Sure, Let me rebase and resend the pinctrl patchset. Thanks, Bhupesh
Hello Linus, On Sat, 26 Jun 2021 at 23:59, Bhupesh Sharma <bhupesh.sharma@linaro.org> wrote: > > Hi Linus, > > On Sat, 26 Jun 2021 at 05:21, Linus Walleij <linus.walleij@linaro.org> wrote: > > > > On Thu, Jun 17, 2021 at 7:34 AM Bhupesh Sharma > > <bhupesh.sharma@linaro.org> wrote: > > > > > Arrange the compatibles inside qcom-pmic gpio device tree > > > bindings alphabetically. > > > > > > While at it, also make some minor cosmetic changes to allow > > > future compatible addition to the bindings simpler. > > > > > > Cc: Linus Walleij <linus.walleij@linaro.org> > > > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > > > > These patches do not apply on the current devel branch in the pin control > > tree: > > https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/log/?h=devel > > > > Please rebase and resend! > > Sure, Let me rebase and resend the pinctrl patchset. v4 (rebased on pinctrl/devel) has been sent out and can be viewed here: [1] [1]. https://lore.kernel.org/linux-gpio/20210629123407.82561-1-bhupesh.sharma@linaro.org/T/#m6595060a61e29d956b1a8ddc7a7a684f1f3b7641 Thanks, Bhupesh
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt index f6a9760558a6..10f049e21264 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt @@ -7,10 +7,20 @@ PMIC's from Qualcomm. Usage: required Value type: <string> Definition: must be one of: + "qcom,pm660-gpio" + "qcom,pm660l-gpio" + "qcom,pm6150-gpio" + "qcom,pm6150l-gpio" "qcom,pm8005-gpio" + "qcom,pm8008-gpio" "qcom,pm8018-gpio" "qcom,pm8038-gpio" "qcom,pm8058-gpio" + "qcom,pm8150-gpio" + "qcom,pm8150b-gpio" + "qcom,pm8350-gpio" + "qcom,pm8350b-gpio" + "qcom,pm8350c-gpio" "qcom,pm8916-gpio" "qcom,pm8917-gpio" "qcom,pm8921-gpio" @@ -22,20 +32,10 @@ PMIC's from Qualcomm. "qcom,pmi8950-gpio" "qcom,pmi8994-gpio" "qcom,pmi8998-gpio" - "qcom,pms405-gpio" - "qcom,pm660-gpio" - "qcom,pm660l-gpio" - "qcom,pm8150-gpio" - "qcom,pm8150b-gpio" - "qcom,pm8350-gpio" - "qcom,pm8350b-gpio" - "qcom,pm8350c-gpio" "qcom,pmk8350-gpio" "qcom,pmr735a-gpio" "qcom,pmr735b-gpio" - "qcom,pm6150-gpio" - "qcom,pm6150l-gpio" - "qcom,pm8008-gpio" + "qcom,pms405-gpio" "qcom,pmx55-gpio" And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio" @@ -97,34 +97,34 @@ to specify in a pin configuration subnode: Value type: <string-array> Definition: List of gpio pins affected by the properties specified in this subnode. Valid pins are: - gpio1-gpio4 for pm8005 - gpio1-gpio6 for pm8018 + gpio1-gpio10 for pm6150 + gpio1-gpio12 for pm6150l + gpio1-gpio4 for pm8005 + gpio1-gpio2 for pm8008 + gpio1-gpio6 for pm8018 gpio1-gpio12 for pm8038 gpio1-gpio40 for pm8058 - gpio1-gpio4 for pm8916 + gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7 + and gpio8) + gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7) + gpio1-gpio12 for pm8150l (hole on gpio7) + gpio1-gpio10 for pm8350 + gpio1-gpio8 for pm8350b + gpio1-gpio9 for pm8350c + gpio1-gpio4 for pm8916 gpio1-gpio38 for pm8917 gpio1-gpio44 for pm8921 gpio1-gpio36 for pm8941 - gpio1-gpio8 for pm8950 (hole on gpio3) + gpio1-gpio8 for pm8950 (hole on gpio3) gpio1-gpio22 for pm8994 gpio1-gpio26 for pm8998 gpio1-gpio22 for pma8084 - gpio1-gpio2 for pmi8950 + gpio1-gpio2 for pmi8950 gpio1-gpio10 for pmi8994 + gpio1-gpio4 for pmk8350 + gpio1-gpio4 for pmr735a + gpio1-gpio4 for pmr735b gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10) - gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7 - and gpio8) - gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7) - gpio1-gpio12 for pm8150l (hole on gpio7) - gpio1-gpio10 for pm8350 - gpio1-gpio8 for pm8350b - gpio1-gpio9 for pm8350c - gpio1-gpio4 for pmk8350 - gpio1-gpio4 for pmr735a - gpio1-gpio4 for pmr735b - gpio1-gpio10 for pm6150 - gpio1-gpio12 for pm6150l - gpio1-gpio2 for pm8008 gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10 and gpio11)
Arrange the compatibles inside qcom-pmic gpio device tree bindings alphabetically. While at it, also make some minor cosmetic changes to allow future compatible addition to the bindings simpler. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> --- .../bindings/pinctrl/qcom,pmic-gpio.txt | 58 +++++++++---------- 1 file changed, 29 insertions(+), 29 deletions(-)