| Message ID | 20210830182445.167527-3-marijn.suijten@somainline.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Use "ref" clocks from firmware for DSI PLL VCO parent | expand |
Quoting Marijn Suijten (2021-08-30 11:24:45) > The DSI PHY/PLL was relying on a global "xo" clock to be found, but the > real clock is named "xo_board" in the DT. The standard nowadays is to > never use global clock names anymore but require the firmware (DT) to > provide every clock binding explicitly with .fw_name. The DSI PLLs have > since been converted to this mechanism (specifically 14nm for SDM660) > and this transient clock can now be removed. > > This issue was originally discovered in: > https://lore.kernel.org/linux-arm-msm/386db1a6-a1cd-3c7d-a88e-dc83f8a1be96@somainline.org/ > and prevented the removal of "xo" at that time. > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > --- Presumably this wants to go with the first one. Acked-by: Stephen Boyd <sboyd@kernel.org>
On 2021-08-31 22:35:56, Stephen Boyd wrote: > Quoting Marijn Suijten (2021-08-30 11:24:45) > > The DSI PHY/PLL was relying on a global "xo" clock to be found, but the > > real clock is named "xo_board" in the DT. The standard nowadays is to > > never use global clock names anymore but require the firmware (DT) to > > provide every clock binding explicitly with .fw_name. The DSI PLLs have > > since been converted to this mechanism (specifically 14nm for SDM660) > > and this transient clock can now be removed. > > > > This issue was originally discovered in: > > https://lore.kernel.org/linux-arm-msm/386db1a6-a1cd-3c7d-a88e-dc83f8a1be96@somainline.org/ > > and prevented the removal of "xo" at that time. > > > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > > --- > > Presumably this wants to go with the first one. What are you referring to with "the first one"? This patch can only go in after patch 1/2 of this series, unless you are suggesting to squash it with Bjorns cleanup and making sure that lands after the fix in the DSI? > Acked-by: Stephen Boyd <sboyd@kernel.org>
Quoting Marijn Suijten (2021-09-01 01:57:15) > On 2021-08-31 22:35:56, Stephen Boyd wrote: > > Quoting Marijn Suijten (2021-08-30 11:24:45) > > > The DSI PHY/PLL was relying on a global "xo" clock to be found, but the > > > real clock is named "xo_board" in the DT. The standard nowadays is to > > > never use global clock names anymore but require the firmware (DT) to > > > provide every clock binding explicitly with .fw_name. The DSI PLLs have > > > since been converted to this mechanism (specifically 14nm for SDM660) > > > and this transient clock can now be removed. > > > > > > This issue was originally discovered in: > > > https://lore.kernel.org/linux-arm-msm/386db1a6-a1cd-3c7d-a88e-dc83f8a1be96@somainline.org/ > > > and prevented the removal of "xo" at that time. > > > > > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > > > --- > > > > Presumably this wants to go with the first one. > > What are you referring to with "the first one"? This patch can only go > in after patch 1/2 of this series, unless you are suggesting to squash > it with Bjorns cleanup and making sure that lands after the fix in the > DSI? The first patch in this series.
Il 30/08/21 20:24, Marijn Suijten ha scritto: > The DSI PHY/PLL was relying on a global "xo" clock to be found, but the > real clock is named "xo_board" in the DT. The standard nowadays is to > never use global clock names anymore but require the firmware (DT) to > provide every clock binding explicitly with .fw_name. The DSI PLLs have > since been converted to this mechanism (specifically 14nm for SDM660) > and this transient clock can now be removed. > > This issue was originally discovered in: > https://lore.kernel.org/linux-arm-msm/386db1a6-a1cd-3c7d-a88e-dc83f8a1be96@somainline.org/ > and prevented the removal of "xo" at that time. > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> > --- > drivers/clk/qcom/gcc-sdm660.c | 14 -------------- > 1 file changed, 14 deletions(-) > > diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/gcc-sdm660.c > index 9b97425008ce..16fd16351f95 100644 > --- a/drivers/clk/qcom/gcc-sdm660.c > +++ b/drivers/clk/qcom/gcc-sdm660.c > @@ -37,19 +37,6 @@ enum { > P_GPLL1_EARLY_DIV, > }; > > -static struct clk_fixed_factor xo = { > - .mult = 1, > - .div = 1, > - .hw.init = &(struct clk_init_data){ > - .name = "xo", > - .parent_data = &(const struct clk_parent_data) { > - .fw_name = "xo" > - }, > - .num_parents = 1, > - .ops = &clk_fixed_factor_ops, > - }, > -}; > - > static struct clk_alpha_pll gpll0_early = { > .offset = 0x0, > .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], > @@ -2281,7 +2268,6 @@ static struct gdsc pcie_0_gdsc = { > }; > > static struct clk_hw *gcc_sdm660_hws[] = { > - &xo.hw, > &gpll0_early_div.hw, > &gpll1_early_div.hw, > }; >
On 2021-09-01 20:46:34, Stephen Boyd wrote: > Quoting Marijn Suijten (2021-09-01 01:57:15) > > On 2021-08-31 22:35:56, Stephen Boyd wrote: > > > Quoting Marijn Suijten (2021-08-30 11:24:45) > > > > The DSI PHY/PLL was relying on a global "xo" clock to be found, but the > > > > real clock is named "xo_board" in the DT. The standard nowadays is to > > > > never use global clock names anymore but require the firmware (DT) to > > > > provide every clock binding explicitly with .fw_name. The DSI PLLs have > > > > since been converted to this mechanism (specifically 14nm for SDM660) > > > > and this transient clock can now be removed. > > > > > > > > This issue was originally discovered in: > > > > https://lore.kernel.org/linux-arm-msm/386db1a6-a1cd-3c7d-a88e-dc83f8a1be96@somainline.org/ > > > > and prevented the removal of "xo" at that time. > > > > > > > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > > > > --- > > > > > > Presumably this wants to go with the first one. > > > > What are you referring to with "the first one"? This patch can only go > > in after patch 1/2 of this series, unless you are suggesting to squash > > it with Bjorns cleanup and making sure that lands after the fix in the > > DSI? > > The first patch in this series. Are you suggesting to squash this patch into the first patch in this series? Note that the first patch touches drm/msm/dsi, the second (this) patch touches clk/qcom.
Quoting Marijn Suijten (2021-09-02 06:05:34) > On 2021-09-01 20:46:34, Stephen Boyd wrote: > > Quoting Marijn Suijten (2021-09-01 01:57:15) > > > On 2021-08-31 22:35:56, Stephen Boyd wrote: > > > > Quoting Marijn Suijten (2021-08-30 11:24:45) > > > > > The DSI PHY/PLL was relying on a global "xo" clock to be found, but the > > > > > real clock is named "xo_board" in the DT. The standard nowadays is to > > > > > never use global clock names anymore but require the firmware (DT) to > > > > > provide every clock binding explicitly with .fw_name. The DSI PLLs have > > > > > since been converted to this mechanism (specifically 14nm for SDM660) > > > > > and this transient clock can now be removed. > > > > > > > > > > This issue was originally discovered in: > > > > > https://lore.kernel.org/linux-arm-msm/386db1a6-a1cd-3c7d-a88e-dc83f8a1be96@somainline.org/ > > > > > and prevented the removal of "xo" at that time. > > > > > > > > > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > > > > > --- > > > > > > > > Presumably this wants to go with the first one. > > > > > > What are you referring to with "the first one"? This patch can only go > > > in after patch 1/2 of this series, unless you are suggesting to squash > > > it with Bjorns cleanup and making sure that lands after the fix in the > > > DSI? > > > > The first patch in this series. > > Are you suggesting to squash this patch into the first patch in this > series? Note that the first patch touches drm/msm/dsi, the second > (this) patch touches clk/qcom. No.
diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/gcc-sdm660.c index 9b97425008ce..16fd16351f95 100644 --- a/drivers/clk/qcom/gcc-sdm660.c +++ b/drivers/clk/qcom/gcc-sdm660.c @@ -37,19 +37,6 @@ enum { P_GPLL1_EARLY_DIV, }; -static struct clk_fixed_factor xo = { - .mult = 1, - .div = 1, - .hw.init = &(struct clk_init_data){ - .name = "xo", - .parent_data = &(const struct clk_parent_data) { - .fw_name = "xo" - }, - .num_parents = 1, - .ops = &clk_fixed_factor_ops, - }, -}; - static struct clk_alpha_pll gpll0_early = { .offset = 0x0, .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT], @@ -2281,7 +2268,6 @@ static struct gdsc pcie_0_gdsc = { }; static struct clk_hw *gcc_sdm660_hws[] = { - &xo.hw, &gpll0_early_div.hw, &gpll1_early_div.hw, };
The DSI PHY/PLL was relying on a global "xo" clock to be found, but the real clock is named "xo_board" in the DT. The standard nowadays is to never use global clock names anymore but require the firmware (DT) to provide every clock binding explicitly with .fw_name. The DSI PLLs have since been converted to this mechanism (specifically 14nm for SDM660) and this transient clock can now be removed. This issue was originally discovered in: https://lore.kernel.org/linux-arm-msm/386db1a6-a1cd-3c7d-a88e-dc83f8a1be96@somainline.org/ and prevented the removal of "xo" at that time. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> --- drivers/clk/qcom/gcc-sdm660.c | 14 -------------- 1 file changed, 14 deletions(-)