From patchwork Fri Oct 8 01:25:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12543997 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F23EEC4321E for ; Fri, 8 Oct 2021 01:25:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DE7076141B for ; Fri, 8 Oct 2021 01:25:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241640AbhJHB1m (ORCPT ); Thu, 7 Oct 2021 21:27:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234268AbhJHB1d (ORCPT ); Thu, 7 Oct 2021 21:27:33 -0400 Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3CCF8C061570 for ; Thu, 7 Oct 2021 18:25:38 -0700 (PDT) Received: by mail-lf1-x130.google.com with SMTP id n8so30599291lfk.6 for ; Thu, 07 Oct 2021 18:25:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=B1tfgMXD/HCZM2/dbxQ/czHnewIDG6QY34tUjSKvwfk=; b=HREMM7YvdSBGH5yCfeBE1GD/MG6qFX3jZvB/hGwR7HZ7db3jFWbR6EjuTL16AfB5UQ koYroB34dm/ZoDXxlxZVaIHC4zdDpnu6Vy7uRPrWOm4t2C6XxRFlKNFN4bTUuSTVTNQY vWACLWBR1Dx5Fz8akQdBCY0VkhkjI8/HeGv+6PNn0pwg170Zq0EUF59oUw3iZN0/fLHe czilOud48xH7CG4PmSkcxH9wRtV9Z1XSRrA24s+ddMsvShtrB0qTXgf9QcU0USltGVH/ 1Do+dge+n5Hnn6CI7GkrIBwFtvS0ZZ7AmfQJzIjXrhHvobw1K1U5m8Eo4xvBONkk8TOi wjZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=B1tfgMXD/HCZM2/dbxQ/czHnewIDG6QY34tUjSKvwfk=; b=5MJL2/lhHd9AoGazBHBz+RR1RQcEgwCvMv+hEtSFLJbE3EGmmmkCzCa02UanBcIsXG FmfkEOIwUvtZ7u7L31879OxyELlJDzX7jvN29+0YrZdiJTXZy/MKSaBvdr4TnzqyFGjs lwSAhyWdB/7YMhOaQObruGEZijjndndclcjqRBzJe2uqpJIeEw+q/PGZPOt4Beo6K5eQ WxKOZeN8Dkm0CafE8XfI1FAfTNsTAeH3zn36PSmIvo9E+YLjNW3jC1/3cWtX3OkcCx3E OKbgha/Ru02xOAfd/DoZaNl+/Yxt2N+pSRLS9nUGeCiNcmMoWgBg9nVrjilsxQYKV8U6 ZEIQ== X-Gm-Message-State: AOAM533sETCEfZ9vqtgoXfuR7R4QueveQKVl16efaarQXbhS8UFWSiYI LH6dA4HvFJX5e8oevCcn3OotHA== X-Google-Smtp-Source: ABdhPJzKdd8/qODtRD3p+6nMYsqC38bIDPZxHTkZ4qvkzYmr0yp6kv6J7YzSEnI+Jxi416yc+t6QVA== X-Received: by 2002:a05:6512:96f:: with SMTP id v15mr7510057lft.455.1633656336652; Thu, 07 Oct 2021 18:25:36 -0700 (PDT) Received: from umbar.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id s4sm112875ljp.115.2021.10.07.18.25.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Oct 2021 18:25:36 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 13/25] pinctrl: qcom: ssbi-mpp: hardcode IRQ counts Date: Fri, 8 Oct 2021 04:25:12 +0300 Message-Id: <20211008012524.481877-14-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211008012524.481877-1-dmitry.baryshkov@linaro.org> References: <20211008012524.481877-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The probing of this driver calls platform_irq_count, which will setup all of the IRQs that are configured in device tree. In preparation for converting this driver to be a hierarchical IRQ chip, hardcode the IRQ count based on the hardware type so that all the IRQs are not configured immediately and are configured on an as-needed basis later in the boot process. This change will also allow for the removal of the interrupts property later in this patch series once the hierarchical IRQ chip support is in. This patch also removes the generic qcom,ssbi-mpp OF match since we don't know the number of pins. All of the existing upstream bindings already include the more-specific binding. Signed-off-by: Dmitry Baryshkov Reviewed-by: Bjorn Andersson --- drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c | 22 ++++++++-------------- 1 file changed, 8 insertions(+), 14 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c b/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c index 92e7f2602847..a90cada1d657 100644 --- a/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c +++ b/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c @@ -733,13 +733,12 @@ static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl, } static const struct of_device_id pm8xxx_mpp_of_match[] = { - { .compatible = "qcom,pm8018-mpp" }, - { .compatible = "qcom,pm8038-mpp" }, - { .compatible = "qcom,pm8058-mpp" }, - { .compatible = "qcom,pm8917-mpp" }, - { .compatible = "qcom,pm8821-mpp" }, - { .compatible = "qcom,pm8921-mpp" }, - { .compatible = "qcom,ssbi-mpp" }, + { .compatible = "qcom,pm8018-mpp", .data = (void *) 6 }, + { .compatible = "qcom,pm8038-mpp", .data = (void *) 6 }, + { .compatible = "qcom,pm8058-mpp", .data = (void *) 12 }, + { .compatible = "qcom,pm8821-mpp", .data = (void *) 4 }, + { .compatible = "qcom,pm8917-mpp", .data = (void *) 10 }, + { .compatible = "qcom,pm8921-mpp", .data = (void *) 12 }, { }, }; MODULE_DEVICE_TABLE(of, pm8xxx_mpp_of_match); @@ -750,19 +749,14 @@ static int pm8xxx_mpp_probe(struct platform_device *pdev) struct pinctrl_pin_desc *pins; struct pm8xxx_mpp *pctrl; int ret; - int i, npins; + int i; pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); if (!pctrl) return -ENOMEM; pctrl->dev = &pdev->dev; - npins = platform_irq_count(pdev); - if (!npins) - return -EINVAL; - if (npins < 0) - return npins; - pctrl->npins = npins; + pctrl->npins = (uintptr_t) device_get_match_data(&pdev->dev); pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL); if (!pctrl->regmap) {