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[24.9.77.57]) by smtp.googlemail.com with ESMTPSA id t5sm2612315ilp.8.2021.11.11.14.02.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Nov 2021 14:02:34 -0800 (PST) From: Jim Cromie To: jbaron@akamai.com, gregkh@linuxfoundation.org, robdclark@gmail.com, sean@poorly.run, daniel.vetter@ffwll.ch, seanpaul@chromium.org, lyude@redhat.com, linux-kernel@vger.kernel.org, rostedt@goodmis.org, mathieu.desnoyers@efficios.com, dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, intel-gvt-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: quic_saipraka@quicinc.com, will@kernel.org, catalin.marinas@arm.com, quic_psodagud@quicinc.com, maz@kernel.org, arnd@arndb.de, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, mingo@redhat.com, jim.cromie@gmail.com Subject: [PATCH v10 05/10] i915/gvt: use dyndbg.BITGRPS for existing pr_debugs Date: Thu, 11 Nov 2021 15:02:01 -0700 Message-Id: <20211111220206.121610-6-jim.cromie@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211111220206.121610-1-jim.cromie@gmail.com> References: <20211111220206.121610-1-jim.cromie@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The gvt component of this driver has ~120 pr_debugs with formats using one of 9 fixed string prefixes, which are quite similar to those enumerated in DRM debug categories. Following the interface model of drm.debug, add a parameter to map bits to these format prefixes. static struct dyndbg_bitdesc i915_bitmap[] = { [0] = { "gvt:cmd:" }, [1] = { "gvt:core:" }, [2] = { "gvt:dpy:" }, [3] = { "gvt:el:" }, [4] = { "gvt:irq:" }, [5] = { "gvt:mm:" }, [6] = { "gvt:mmio:" }, [7] = { "gvt:render:" }, [8] = { "gvt:sched:" } }; DEFINE_DYNAMIC_DEBUG_BITGRPS(debug_gvt, __gvt_debug, "dyndbg bitmap desc", If CONFIG_DYNAMIC_DEBUG_CORE=y, then gvt/Makefile adds -DDYNAMIC_DEBUG_MODULE to cflags, which CONFIG_DYNAMIC_DEBUG=n (CORE-only) builds need. This is redone more comprehensively soon. Signed-off-by: Jim Cromie --- drivers/gpu/drm/i915/Makefile | 2 ++ drivers/gpu/drm/i915/intel_gvt.c | 38 ++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 660bb03de6fc..0fa5f53312a8 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -317,6 +317,8 @@ i915-y += intel_gvt.o include $(src)/gvt/Makefile endif +ccflags-$(CONFIG_DYNAMIC_DEBUG_CORE) += -DDYNAMIC_DEBUG_MODULE + obj-$(CONFIG_DRM_I915) += i915.o obj-$(CONFIG_DRM_I915_GVT_KVMGT) += gvt/kvmgt.o diff --git a/drivers/gpu/drm/i915/intel_gvt.c b/drivers/gpu/drm/i915/intel_gvt.c index 4e70c1a9ef2e..efaac5777873 100644 --- a/drivers/gpu/drm/i915/intel_gvt.c +++ b/drivers/gpu/drm/i915/intel_gvt.c @@ -162,3 +162,41 @@ void intel_gvt_resume(struct drm_i915_private *dev_priv) if (intel_gvt_active(dev_priv)) intel_gvt_pm_resume(dev_priv->gvt); } + +#if defined(CONFIG_DRM_USE_DYNAMIC_DEBUG) + +unsigned long __gvt_debug; +EXPORT_SYMBOL(__gvt_debug); + +static struct dyndbg_bitdesc i915_dyndbg_bitmap[] = { + [0] = { "gvt:cmd:" }, + [1] = { "gvt:core:" }, + [2] = { "gvt:dpy:" }, + [3] = { "gvt:el:" }, + [4] = { "gvt:irq:" }, + [5] = { "gvt:mm:" }, + [6] = { "gvt:mmio:" }, + [7] = { "gvt:render:" }, + [8] = { "gvt:sched:" } +}; + +#define help_(_N, _cat) "\t Bit-" #_N ":\t" _cat "\n" + +#define I915_GVT_CATEGORIES(name) \ + " Enable debug output via /sys/module/i915/parameters/" #name \ + ", where each bit enables a debug category.\n" \ + help_(0, "gvt:cmd:") \ + help_(1, "gvt:core:") \ + help_(2, "gvt:dpy:") \ + help_(3, "gvt:el:") \ + help_(4, "gvt:irq:") \ + help_(5, "gvt:mm:") \ + help_(6, "gvt:mmio:") \ + help_(7, "gvt:render:") \ + help_(8, "gvt:sched:") + +DEFINE_DYNAMIC_DEBUG_BITGRPS(debug_gvt, __gvt_debug, + I915_GVT_CATEGORIES(debug_gvt), + i915_dyndbg_bitmap); + +#endif